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* This change adds co-processor condition branching and conditional traps to ↵Chris Dewhurst2016-03-091-0/+184
| | | | | | | | | | | | | | | | the Sparc back-end. This will allow inline assembler code to utilize these features, but no automatic lowering is provided, except for the previously provided @llvm.trap, which lowers to "ta 5". The change also separates out the different assembly language syntaxes for V8 and V9 Sparc. Previously, only V9 Sparc assembly syntax was provided. The change also corrects the selection order of trap disassembly, allowing, e.g. "ta %g0 + 15" to be rendered, more readably, as "ta 15", ignoring the %g0 register. This is per the sparc v8 and v9 manuals. Check-in includes many extra unit tests to check this works correctly on both V8 and V9 Sparc processors. Code Reviewed at http://reviews.llvm.org/D17960. llvm-svn: 263044
* [SPARC] Repair floating-point condition encodings in assembly parser.James Y Knight2016-02-101-0/+13
| | | | | | | | | | | | | | | The encodings for floating point conditions A(lways) and N(ever) were incorrectly specified for the assembly parser, per Sparc manual v8 page 121. This change corrects that mistake. Also, strangely, all of the branch instructions already had MC test cases, except for the broken ones. Added the tests. Patch by Chris Dewhurst Differential Revision: http://reviews.llvm.org/D17074 llvm-svn: 260390
* [SPARC] Both GNU and Solaris as support eq as condition code for integer ops.Joerg Sonnenberger2015-09-161-0/+4
| | | | llvm-svn: 247804
* Sparc: Prefer reg+reg address encoding when only one register used.James Y Knight2015-04-291-3/+3
| | | | | | | | | | | Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces. Futhermore, reg+imm is invalid for the (not yet supported) "alternate address space" instructions. Differential Revision: http://reviews.llvm.org/D8753 llvm-svn: 236107
* Sparc: Add alternate aliases for conditional branch instructions.James Y Knight2015-04-281-0/+24
| | | | llvm-svn: 236042
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-021-0/+2
| | | | llvm-svn: 202666
* [Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju2014-03-011-0/+116
| | | | llvm-svn: 202599
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-101-0/+13
| | | | | | jmp instructions as aliases to jmpl. llvm-svn: 198909
* [Sparc] Add support for parsing branch instructions and conditional moves.Venkatraman Govindaraju2014-01-081-0/+114
| | | | llvm-svn: 198738
* [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., Venkatraman Govindaraju2014-01-071-7/+17
| | | | | | Also, correct the offsets for FixupsKindInfo. llvm-svn: 198681
* [Sparc] Add support for parsing memory operands in sparc AsmParser.Venkatraman Govindaraju2014-01-071-0/+23
llvm-svn: 198658
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