| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Properly evaluate fixup_riscv_pcrel_lo12 | Alex Bradbury | 2018-12-20 | 1 | -18/+9 |
| * | [RISCV] Tablegen-driven Instruction Compression. | Sameer AbuAsal | 2018-04-06 | 1 | -13/+1 |
| * | [RISCV] Implement MC relaxations for compressed instructions. | Sameer AbuAsal | 2018-03-02 | 1 | -2/+4 |
| * | [RISCV] Add support for %pcrel_lo. | Ahmed Charles | 2018-02-06 | 1 | -0/+20 |
| * | [RISCV] Enable emission of alias instructions by default | Alex Bradbury | 2017-12-15 | 1 | -1/+1 |
| * | [RISCV] MC layer support for the jump/branch instructions of the RVC extension | Alex Bradbury | 2017-12-07 | 1 | -2/+12 |
| * | [RISCV] Add common fixups and relocations | Alex Bradbury | 2017-09-28 | 1 | -0/+65 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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