| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips] Accept 32-bit offsets for lb and lbu commands | Simon Atanasyan | 2018-04-26 | 1 | -4/+4 |
| * | [mips] Show an error if register number is out of range | Simon Atanasyan | 2018-04-24 | 1 | -16/+16 |
| * | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 1 | -0/+46 |
| * | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 2016-05-12 | 1 | -4/+2 |
| * | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-05-11 | 1 | -2/+4 |
| * | [mips][microMIPS] Revert commit r266861. | Zoran Jovanovic | 2016-04-22 | 1 | -4/+2 |
| * | [mips][microMIPS]Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-04-20 | 1 | -2/+4 |
| * | [mips] Invalid tests for MTC0, MTC2, MFC0, MFC2, DMTC0, DMFC0 MIPS instructions | Hrvoje Varga | 2016-03-11 | 1 | -0/+8 |
| * | [mips][ias] Range check uimm5 operands and fix several bugs this revealed. | Daniel Sanders | 2015-11-26 | 1 | -3/+7 |
| * | [mips] Add backend support for Mips32r[35] and Mips64r[35]. | Daniel Sanders | 2015-02-18 | 1 | -0/+10 |
