summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/Disassembler/Mips/micromips-dspr2
Commit message (Collapse)AuthorAgeFilesLines
* [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, ↵Zlatko Buljan2016-05-171-0/+14
| | | | | | | | CMPGU* and CMPU* instructions Differential Revision: http://reviews.llvm.org/D16182 llvm-svn: 269752
* [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and ↵Hrvoje Varga2016-05-131-0/+2
| | | | | | | | MULSAQ_S.W.PH instructions Differential Revision: http://reviews.llvm.org/D14117 llvm-svn: 269408
* [mips][microMIPS][DSP] Implement PACKRL.PH, PICK.PH, PICK.QB, SHILO, SHILOV ↵Zlatko Buljan2015-12-181-0/+7
| | | | | | | | and WRDSP instructions Differential Revision: http://reviews.llvm.org/D14429 llvm-svn: 255991
* [mips][microMIPS] Implement PREPEND, RADDU.W.QB, RDDSP, REPL.PH, REPL.QB, ↵Hrvoje Varga2015-12-021-0/+1
| | | | | | | | REPLV.PH, REPLV.QB and MTHLIP instructions Differential Revision: http://reviews.llvm.org/D14527 llvm-svn: 254496
* [mips][microMIPS] Implement PRECR.QB.PH, PRECR_SRA[_R].PH.W, PRECRQ.PH.W, ↵Zlatko Buljan2015-11-301-0/+7
| | | | | | | | PRECRQ.QB.PH, PRECRQU_S.QB.PH and PRECRQ_RS.PH.W instructions Differential Revision: http://reviews.llvm.org/D14605 llvm-svn: 254291
* [mips][microMIPS] Implement MUL[_S].PH, MULEQ_S.W.PHL, MULEQ_S.W.PHR, ↵Hrvoje Varga2015-11-201-0/+10
| | | | | | | | MULEU_S.PH.QBL, MULEU_S.PH.QBR, MULQ_RS.PH, MULQ_RS.W, MULQ_S.PH and MULQ_S.W instructions Differential Revision: http://reviews.llvm.org/D14280 llvm-svn: 253651
* [mips][microMIPS] Implement DPS.W.PH, DPSQ_S.W.PH, DPSQ_SA.L.W, ↵Hrvoje Varga2015-11-181-0/+8
| | | | | | | | DPSQX_S.W.PH, DPSQX_SA.W.PH, DPSU.H.QBL, DPSU.H.QBR and DPSX.W.PH instructions Differential Revision: http://reviews.llvm.org/D14058 llvm-svn: 253443
* [mips][microMIPS] Implement EXTP, EXTPDP, EXTPDPV, EXTPV, EXTR[_RS].W, ↵Zlatko Buljan2015-11-171-0/+12
| | | | | | | | EXTR_S.H, EXTRV[_RS].W and EXTRV_S.H instructions Differential Revision: http://reviews.llvm.org/D14174 llvm-svn: 253332
* [mips][microMIPS] Implement SUBQ[_S].PH, SUBQ_S.W, SUBQH[_R].PH, ↵Zlatko Buljan2015-11-171-0/+13
| | | | | | | | SUBQH[_R].W, SUBU[_S].PH, SUBU[_S].QB and SUBUH[_R].QB instructions Differential Revision: http://reviews.llvm.org/D14114 llvm-svn: 253329
* [mips][microMIPS] Implement PRECEQ.W.PHL, PRECEQ.W.PHR, PRECEQU.PH.QBL, ↵Zlatko Buljan2015-11-171-0/+10
| | | | | | | | PRECEQU.PH.QBLA, PRECEQU.PH.QBR, PRECEQU.PH.QBRA, PRECEU.PH.QBL, PRECEU.PH.QBLA, PRECEU.PH.QBR and PRECEU.PH.QBRA instructions Differential Revision: http://reviews.llvm.org/D14279 llvm-svn: 253326
* Added microMIPSDSPr1 assembler and disassembler tests to existing ↵Zlatko Buljan2015-11-171-5/+41
| | | | | | microMIPSDSPr2 test files. llvm-svn: 253320
* [mips][microMIPS] Implement SHRA[_R].PH, SHRAV[_R].PH, SHRAV[_R].QB, ↵Zlatko Buljan2015-11-131-0/+4
| | | | | | | | SHRAV_R.W, SHRA_R.W, SHRL.PH, SHRL.QB, SHRLV.PH and SHRLV.QB instructions Differential Revision: http://reviews.llvm.org/D14010 llvm-svn: 253041
* [mips][microMIPS] Implement SHLL.PH, SHLL_S.PH, SHLL.QB, SHLLV.PH, ↵Zlatko Buljan2015-10-231-0/+2
| | | | | | | | SHLLV_S.PH, SHLLV.QB, SHLLV_S.W, SHLL_S.W, SHRA.QB and SHRA_R.QB instructions Differential Revision: http://reviews.llvm.org/D13929 llvm-svn: 251098
* [mips][microMIPS] Implement ADDQ.PH, ADDQ_S.W, ADDQH.PH, ADDQH.W, ADDSC, ↵Zlatko Buljan2015-10-191-0/+8
| | | | | | | | ADDU.PH, ADDU_S.QB, ADDWC and ADDUH.QB instructions Differential Revision: http://reviews.llvm.org/D13130 llvm-svn: 250685
* [mips][microMIPS] Implement ABSQ.QB, ABSQ_S.PH, ABSQ_S.W, ABSQ_S.QB, INSV, ↵Zlatko Buljan2015-10-191-1/+2
| | | | | | | | MADD, MADDU, MSUB, MSUBU, MULT and MULTU instructions Differential Revision: http://reviews.llvm.org/D13721 llvm-svn: 250683
* Commited two test files which are forgotten during commit of patch for ↵Zlatko Buljan2015-10-161-0/+6
http://reviews.llvm.org/D13376 llvm-svn: 250512
OpenPOWER on IntegriCloud