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* [Hexagon] Replacing the remaining postincrement stores with versions that ↵Colin LeMahieu2014-12-291-1/+40
| | | | | | have encoding bits. llvm-svn: 224951
* [Hexagon] Renaming old multiclass for removal. Adding post-increment store ↵Colin LeMahieu2014-12-291-0/+14
| | | | | | classes and instruction defs. llvm-svn: 224949
* [Hexagon] Adding auto-incrementing loads with and without byte reversal.Colin LeMahieu2014-12-261-0/+24
| | | | llvm-svn: 224871
* [Hexagon] Adding locked loads.Colin LeMahieu2014-12-261-0/+4
| | | | llvm-svn: 224870
* [Hexagon] Adding deallocframe and circular addressing loads.Colin LeMahieu2014-12-261-0/+39
| | | | llvm-svn: 224869
* [Hexagon] Adding remaining post-increment instruction variants. Removing ↵Colin LeMahieu2014-12-261-0/+36
| | | | | | unused classes. llvm-svn: 224868
* [Hexagon] Adding post-increment unsigned byte loads.Colin LeMahieu2014-12-261-10/+22
| | | | llvm-svn: 224867
* [Hexagon] Adding post-increment signed byte loads with tests.Colin LeMahieu2014-12-261-0/+17
| | | | llvm-svn: 224866
* [Hexagon] Adding doubleword load.Colin LeMahieu2014-12-231-0/+10
| | | | llvm-svn: 224787
* [Hexagon] Reapplying 224775 load words.Colin LeMahieu2014-12-231-0/+12
| | | | llvm-svn: 224786
* Reverting 224775 until mayLoad flag is addressed.Colin LeMahieu2014-12-231-12/+0
| | | | llvm-svn: 224783
* [Hexagon] Adding word loads.Colin LeMahieu2014-12-231-0/+12
| | | | llvm-svn: 224775
* [Hexagon] Adding signed halfword loads.Colin LeMahieu2014-12-231-0/+14
| | | | llvm-svn: 224774
* [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.Colin LeMahieu2014-12-221-0/+12
| | | | llvm-svn: 224735
* [Hexagon] Adding classes and load unsigned byte instruction, updating usages.Colin LeMahieu2014-12-221-0/+14
| | | | llvm-svn: 224730
* [Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu2014-12-191-0/+2
| | | | llvm-svn: 224612
* [Hexagon] Adding bit extraction and table indexing instructions.Colin LeMahieu2014-12-191-0/+16
| | | | llvm-svn: 224610
* [Hexagon] Adding bit insertion instructions.Colin LeMahieu2014-12-191-0/+8
| | | | llvm-svn: 224609
* [Hexagon] Adding more xtype shift instructions.Colin LeMahieu2014-12-192-0/+22
| | | | llvm-svn: 224608
* [Hexagon] Adding xtype shift instructions.Colin LeMahieu2014-12-192-0/+132
| | | | llvm-svn: 224604
* [Hexagon] Adding transfers to and from control registers.Colin LeMahieu2014-12-191-1/+5
| | | | llvm-svn: 224599
* [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu2014-12-191-0/+20
| | | | llvm-svn: 224556
* Reverting 224550, was not ready for commit.Colin LeMahieu2014-12-181-20/+0
| | | | llvm-svn: 224552
* [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu2014-12-181-0/+20
| | | | llvm-svn: 224550
* [Hexagon] Updating doubleword shift usages to new versions.Colin LeMahieu2014-12-161-0/+8
| | | | llvm-svn: 224391
* [Hexagon] Adding tstbit/bitclr/bitset instructions.Colin LeMahieu2014-12-161-0/+10
| | | | llvm-svn: 224374
* [Hexagon] Adding bit count and twiddling instructions.Colin LeMahieu2014-12-161-0/+30
| | | | llvm-svn: 224367
* [Hexagon] Adding asr/lsr/asl reg/imm, asl with saturation, asr with ↵Colin LeMahieu2014-12-163-0/+22
| | | | | | rounding. Doubleword abs/neg/not. Interleave and deinterleave instructions. llvm-svn: 224365
* [Hexagon] Adding absolute value, and negate with saturationColin LeMahieu2014-12-162-3/+9
| | | | llvm-svn: 224346
* [Hexagon] Adding saturate and swizzle instructions.Colin LeMahieu2014-12-161-0/+14
| | | | llvm-svn: 224343
* [Hexagon] Adding doubleword multiplies with and without accumulation.Colin LeMahieu2014-12-161-0/+12
| | | | llvm-svn: 224293
* [Hexagon] Adding halfword to doubleword multiplies.Colin LeMahieu2014-12-151-0/+24
| | | | llvm-svn: 224289
* [Hexagon] Adding logical-logical accumulation instructions and tests.Colin LeMahieu2014-12-151-0/+12
| | | | llvm-svn: 224288
* [Hexagon] Adding a number of additional multiply forms with tests.Colin LeMahieu2014-12-151-0/+20
| | | | llvm-svn: 224282
* [Hexagon] Adding misc multiply encodings and tests.Colin LeMahieu2014-12-151-0/+10
| | | | llvm-svn: 224273
* [Hexagon] Adding doubleworld accumulating multiplies of halfwords.Colin LeMahieu2014-12-151-0/+32
| | | | llvm-svn: 224267
* [Hexagon] Adding accumulating half word multiplies.Colin LeMahieu2014-12-151-0/+48
| | | | llvm-svn: 224266
* [Hexagon] Adding multiply with rnd/sat/rndsatColin LeMahieu2014-12-151-0/+32
| | | | llvm-svn: 224265
* [Hexagon] Adding encoding bits for halfword multiplies.Colin LeMahieu2014-12-151-0/+10
| | | | llvm-svn: 224261
* [Hexagon] Adding double word add/min/minu/max/maxu instructions and tests.Colin LeMahieu2014-12-121-0/+14
| | | | llvm-svn: 224153
* [Hexagon] Adding J class call instructions.Colin LeMahieu2014-12-121-0/+8
| | | | llvm-svn: 224150
* [Hexagon] Adding encoding information for sign extend word instruction.Colin LeMahieu2014-12-111-0/+2
| | | | llvm-svn: 224026
* [Hexagon] Adding combine ri/ir instructions.Colin LeMahieu2014-12-101-0/+4
| | | | llvm-svn: 223971
* [Hexagon] Adding encodings for JR class instructions. Updating complier usages.Colin LeMahieu2014-12-101-0/+20
| | | | llvm-svn: 223967
* [Hexagon] Adding JR class predicated call reg instructions.Colin LeMahieu2014-12-101-0/+6
| | | | llvm-svn: 223933
* [Hexagon] Fixing broken tests.Colin LeMahieu2014-12-092-13/+13
| | | | llvm-svn: 223823
* [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.Colin LeMahieu2014-12-092-0/+22
| | | | llvm-svn: 223821
* [Hexagon] Adding word combine dot-new form and replacing old combine opcode.Colin LeMahieu2014-12-091-0/+6
| | | | llvm-svn: 223815
* [Hexagon] Updating predicate register transfers and adding tstbit to allow ↵Colin LeMahieu2014-12-091-0/+4
| | | | | | select selection. Updating ll tests with predicate transfers that previously had nop encodings. llvm-svn: 223800
* [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register ↵Colin LeMahieu2014-12-082-0/+22
| | | | | | forms, mask, and vitpack instructions and patterns. llvm-svn: 223710
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