summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt
Commit message (Collapse)AuthorAgeFilesLines
* [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredictable encodingsOliver Stannard2019-09-031-0/+178
Decoding of VMSR doesn't diagnose some unpredictable encodings, as the unpredictable bits are not correctly set. Diff-reduce this instruction's internals WRT VMRS so I can see the differences better. Mostly this is s/src/Rt/g. Fill in the "should-be-(0)" bits. Designate the Unpredictable{} bits for both VMRS and VMSR. Patch by Mark Murray! Differential revision: https://reviews.llvm.org/D66938 llvm-svn: 370729
OpenPOWER on IntegriCloud