Commit message (Collapse) | Author | Age | Files | Lines | |
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* | [AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction | Sjoerd Meijer | 2018-07-06 | 1 | -0/+10 |
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction. Differential Revision: https://reviews.llvm.org/D48918 llvm-svn: 336418 |