summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/Disassembler/AMDGPU
Commit message (Collapse)AuthorAgeFilesLines
* [AMDGPU] Remove duplicate gfx10 assembler and disassembler testsJay Foad2020-01-141-9/+0
| | | | | | | | | | | | Summary: Depends on D72611. Reviewers: rampitec, arsenm Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72616
* [AMDGPU] Add gfx9 assembler and disassembler test casesJay Foad2020-01-141-0/+1902
| | | | | | | | | | | | | | Summary: This adds assembler tests for cases that were previously only in the disassembler tests, and vice versa. Reviewers: rampitec, arsenm, nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72592
* [AMDGPU] Add gfx8 assembler and disassembler test casesJay Foad2020-01-121-0/+3105
| | | | | | | | | | | | | | Summary: This adds assembler tests for cases that were previously only in the disassembler tests, and vice versa. Reviewers: rampitec, arsenm, nhaehnle Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72561
* [AMDGPU][MC][GFX10] Enabled v_movrel*[sdwa|dpp|dpp8] opcodesDmitry Preobrazhensky2019-11-183-0/+60
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43712 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D70170
* [AMDGPU] return Fail instead of SolfFail from addOperand()Stanislav Mekhanoshin2019-11-051-0/+4
| | | | | | | | | | | | | | | | | | | | addOperand() method of AMDGPU disassembler returns SoftFail on error. All instances which may lead to that place are an impossible encdoing, not something which is possible to encode, but semantically incorrect as described for SoftFail. Then tablegen generates a check of the following form: if (Decode...(..) == MCDisassembler::Fail) { return MCDisassembler::Fail; } Since we can only return Success and SoftFail that is dead code as detected by the static code analyzer. Solution: return Fail as it should be. See https://bugs.llvm.org/show_bug.cgi?id=43886 Differential Revision: https://reviews.llvm.org/D69819
* [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64Dmitry Preobrazhensky2019-10-281-0/+132
| | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43747 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69348
* [AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32Dmitry Preobrazhensky2019-10-182-0/+16
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43608 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D69096 llvm-svn: 375241
* [AMDGPU][MC][GFX9][GFX10] Corrected number of src operands for ↵Dmitry Preobrazhensky2019-10-111-24/+24
| | | | | | | | | | | | ds_[read/write]_addtid_b32 See https://bugs.llvm.org/show_bug.cgi?id=37941 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68787 llvm-svn: 374561
* [AMDGPU][MC][GFX6][GFX7][GFX10] Added instructions ↵Dmitry Preobrazhensky2019-10-111-0/+31
| | | | | | | | | | | | buffer_atomic_[fcmpswap/fmin/fmax]* See https://bugs.llvm.org/show_bug.cgi?id=28232 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68788 llvm-svn: 374559
* [AMDGPU][MC][GFX10] Enabled null for 64-bit dst operandsDmitry Preobrazhensky2019-10-111-0/+9
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=43524 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68785 llvm-svn: 374557
* [AMDGPU][MC][GFX10][WS32] Corrected decoding of dst operand for v_cmp_*_sdwa ↵Dmitry Preobrazhensky2019-10-041-0/+6
| | | | | | | | | | | | opcodes See bug 43484: https://bugs.llvm.org/show_bug.cgi?id=43484 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68349 llvm-svn: 373745
* [AMDGPU][MC][GFX10] Enabled decoding of 'null' operandDmitry Preobrazhensky2019-10-041-0/+7
| | | | | | | | | | See bug 43485: https://bugs.llvm.org/show_bug.cgi?id=43485 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68348 llvm-svn: 373740
* [AMDGPU][MC][GFX10] Corrected definition of FLAT GLOBAL/SCRATCH instructionsDmitry Preobrazhensky2019-10-041-0/+75
| | | | | | | | | | See bug 43483: https://bugs.llvm.org/show_bug.cgi?id=43483 Reviewers: arsenm, rampitec Differential Revision: https://reviews.llvm.org/D68347 llvm-svn: 373736
* Re-commit: [AMDGPU] Use S_DENORM_MODE for gfx10Austin Kerbow2019-08-061-1/+1
| | | | | | | | | | | | | | | | Summary: During fdiv32 lowering use S_DENORM_MODE to select denorm mode in gfx10. Reviewers: arsenm, rampitec Reviewed By: arsenm, rampitec Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65620 llvm-svn: 367969
* Revert "Try to fix failing AMDGPU disasm test, both Lin/Win agree this is 0 ↵Dmitri Gribenko2019-08-051-1/+1
| | | | | | | | not 0x0" This reverts commit r367907, it broke the test. llvm-svn: 367909
* Try to fix failing AMDGPU disasm test, both Lin/Win agree this is 0 not 0x0Reid Kleckner2019-08-051-1/+1
| | | | llvm-svn: 367907
* [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructionsDmitry Preobrazhensky2019-07-154-74/+74
| | | | | | | | | | See bug 42599: https://bugs.llvm.org/show_bug.cgi?id=42599 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D64716 llvm-svn: 366067
* [AMDGPU] gfx908 atomic fadd and atomic pk_faddStanislav Mekhanoshin2019-07-111-0/+103
| | | | | | Differential Revision: https://reviews.llvm.org/D64435 llvm-svn: 365717
* [AMDGPU] gfx908 dot instruction supportStanislav Mekhanoshin2019-07-111-0/+348
| | | | | | Differential Revision: https://reviews.llvm.org/D64431 llvm-svn: 365715
* [AMDGPU] gfx908 v_pk_fmac_f16 supportStanislav Mekhanoshin2019-07-091-0/+46
| | | | | | Differential Revision: https://reviews.llvm.org/D64433 llvm-svn: 365573
* [AMDGPU] gfx908 mAI instructions, MC partStanislav Mekhanoshin2019-07-091-0/+979
| | | | | | Differential Revision: https://reviews.llvm.org/D64446 llvm-svn: 365563
* [AMDGPU] gfx908 targetStanislav Mekhanoshin2019-07-091-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D64429 llvm-svn: 365525
* [AMDGPU][MC] Enabled constant expressions as operands of sendmsgDmitry Preobrazhensky2019-06-282-6/+21
| | | | | | | | | | See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D62735 llvm-svn: 364645
* [AMDGPU] Allow any value in unused src0 field in v_nopTim Renouf2019-06-243-0/+9
| | | | | | | | | | | | | Summary: The LLVM disassembler assumes that the unused src0 operand of v_nop is zero. Other tools can put another value in that field, which is still valid. This commit fixes the LLVM disassembler to recognize such an encoding as v_nop, in the same way as we already do for s_getpc. Differential Revision: https://reviews.llvm.org/D63724 Change-Id: Iaf0363eae26ff92fc4ebc716216476adbff37a6f llvm-svn: 364208
* [AMDGPU] gfx10 tests. NFC.Stanislav Mekhanoshin2019-06-204-0/+100048
| | | | llvm-svn: 363946
* [AMDGPU] gfx1010 core wave32 changesStanislav Mekhanoshin2019-06-202-0/+170
| | | | | | Differential Revision: https://reviews.llvm.org/D63204 llvm-svn: 363934
* [AMDGPU] gfx1011/gfx1012 targetsStanislav Mekhanoshin2019-06-142-0/+211
| | | | | | Differential Revision: https://reviews.llvm.org/D63307 llvm-svn: 363344
* [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operandsDmitry Preobrazhensky2019-06-031-0/+81
| | | | | | | | | | See bug 39292: https://bugs.llvm.org/show_bug.cgi?id=39292 Reviewers: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D62660 llvm-svn: 362400
* [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_forkDmitry Preobrazhensky2019-05-172-4/+4
| | | | | | | | | | See https://bugs.llvm.org/show_bug.cgi?id=41888 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D62016 llvm-svn: 361040
* [AMDGPU] gfx1010 tests. NFC.Stanislav Mekhanoshin2019-05-131-0/+10
| | | | llvm-svn: 360615
* [AMDGPU] gfx1010 tests. NFC.Stanislav Mekhanoshin2019-05-081-0/+36
| | | | | | Added tests which now pass after code commits. llvm-svn: 360300
* [AMDGPU] gfx1010 exp modificationsStanislav Mekhanoshin2019-05-081-0/+49
| | | | | | Differential Revision: https://reviews.llvm.org/D61701 llvm-svn: 360287
* [AMDGPU] gfx1010 allows VOP3 to have a literalStanislav Mekhanoshin2019-05-022-0/+198
| | | | | | Differential Revision: https://reviews.llvm.org/D61413 llvm-svn: 359756
* [AMDGPU] gfx1010 MIMG implementationStanislav Mekhanoshin2019-05-012-0/+380
| | | | | | Differential Revision: https://reviews.llvm.org/D61339 llvm-svn: 359698
* [AMDGPU] gfx1010 VOP2 changesStanislav Mekhanoshin2019-04-261-0/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D61156 llvm-svn: 359316
* [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, ↵Dmitry Preobrazhensky2019-03-201-0/+79
| | | | | | | | | | | | private_base, private_limit, pops_exiting_wave_id See bug 39297: https://bugs.llvm.org/show_bug.cgi?id=39297 Reviewers: artem.tamazov, arsenm, rampitec Differential Revision: https://reviews.llvm.org/D59290 llvm-svn: 356561
* [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmeticTim Renouf2019-03-182-0/+47
| | | | | | | | | | | | | | Allow the clamp modifier on vop3 int arithmetic instructions in assembly and disassembly. This involved adding a clamp operand to the affected instructions in MIR and MC, and thus having to fix up several places in codegen and MIR tests. Differential Revision: https://reviews.llvm.org/D59267 Change-Id: Ic7775105f02a985b668fa658a0cd7837846a534e llvm-svn: 356399
* [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source modifiersTim Renouf2019-03-181-0/+9
| | | | | | | | | | | | | | | | | This commit allows v_cndmask_b32_e64 with abs, neg source modifiers on src0, src1 to be assembled and disassembled. This does appear to be allowed, even though they are floating point modifiers and the operand type is b32. To do this, I added src0_modifiers and src1_modifiers to the MachineInstr, which involved fixing up several places in codegen and mir tests. Differential Revision: https://reviews.llvm.org/D59191 Change-Id: I69bf4a8c73ebc65744f6110bb8fc4e937d79fbea llvm-svn: 356398
* [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, ↵Dmitry Preobrazhensky2019-03-041-0/+6
| | | | | | | | | | | | v_readlane_b32 and v_writelane_b32 See bug 40662: https://bugs.llvm.org/show_bug.cgi?id=40662 Reviewers: artem.tamazov, arsenm, rampitec Differential Revision: https://reviews.llvm.org/D58713 llvm-svn: 355312
* [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of ↵Dmitry Preobrazhensky2019-02-272-0/+18
| | | | | | | | | | | | instructions s_set_gpr_idx_on and s_set_gpr_idx_mode See bug 39331: https://bugs.llvm.org/show_bug.cgi?id=39331 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D58288 llvm-svn: 354969
* [AMDGPU][MC] Added support of lds_direct operandDmitry Preobrazhensky2019-02-081-0/+19
| | | | | | | | | | See bug 39293: https://bugs.llvm.org/show_bug.cgi?id=39293 Reviewers: artem.tamazov, rampitec Differential Revision: https://reviews.llvm.org/D57889 llvm-svn: 353524
* [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operandsDmitry Preobrazhensky2019-01-181-0/+7
| | | | | | | | | | See bug 39332: https://bugs.llvm.org/show_bug.cgi?id=39332 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D56794 llvm-svn: 351555
* AMDGPU: Fix v_dot{4, 8}* instruction encodingKonstantin Zhuravlyov2018-05-151-8/+308
| | | | | | Differential Revision: https://reviews.llvm.org/D46848 llvm-svn: 332387
* AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasmKonstantin Zhuravlyov2018-05-151-0/+973
| | | | | | Differential Revision: https://reviews.llvm.org/D46853 llvm-svn: 332377
* AMDGPU: Add Vega12 and Vega20Matt Arsenault2018-04-301-0/+6
| | | | | | | | Changes by Matt Arsenault Konstantin Zhuravlyov llvm-svn: 331215
* [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32Dmitry Preobrazhensky2018-04-163-1/+19
| | | | | | | | | See bug 36356: https://bugs.llvm.org/show_bug.cgi?id=36356 Differential Revision: https://reviews.llvm.org/D45446 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 330123
* [AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32Dmitry Preobrazhensky2018-04-114-0/+16
| | | | | | | | | See bug 36845: https://bugs.llvm.org/show_bug.cgi?id=36845 Differential Revision: https://reviews.llvm.org/D45443 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329801
* [AMDGPU][MC][GFX9] Added instructions s_mul_hi_*32, s_lshl*_add_u32Dmitry Preobrazhensky2018-04-091-0/+28
| | | | | | | | | | | See bugs 36841: https://bugs.llvm.org/show_bug.cgi?id=36841 36842: https://bugs.llvm.org/show_bug.cgi?id=36842 Differential Revision: https://reviews.llvm.org/D45251 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329562
* [AMDGPU][MC][GFX9] Added s_call_b64Dmitry Preobrazhensky2018-04-061-0/+9
| | | | | | | | | See bug 36843: https://bugs.llvm.org/show_bug.cgi?id=36843 Differential Revision: https://reviews.llvm.org/D45268 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329440
* [AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_doneDmitry Preobrazhensky2018-04-061-0/+4
| | | | | | | | | See bug 36844: https://bugs.llvm.org/show_bug.cgi?id=36844 Differential Revision: https://reviews.llvm.org/D45313 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 329430
OpenPOWER on IntegriCloud