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* Recognize that ARM1176JZ[F]-S support TrustZoneArtyom Skrobov2015-10-292-1/+3
| | | | | | | | | | | | | | Summary: ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic (the old name for SMC, as defined in ARMv6KZ) wasn't supported. Reviewers: jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14154 llvm-svn: 251627
* [ARM] Allow SP in rGPR, starting from ARMv8Artyom Skrobov2015-10-284-48/+74
| | | | | | | | | | | | | | | | | Summary: This patch handles assembly and disassembly, but not codegen, as of yet. Additionally, it fixes a bug whereby SP and PC as shifted-reg operands were treated as predictable in ARMv7 Thumb; and it enables the tests for invalid and unpredictable instructions to run on both ARMv7 and ARMv8. Reviewers: jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14141 llvm-svn: 251516
* Actually switch the arch when we see .arch. PR21695Roman Divacky2015-10-021-0/+12
| | | | llvm-svn: 249165
* ARM: diagnose invalid local fixups on Thumb1Tim Northover2015-10-027-2/+55
| | | | | | | | | We previously stopped producing Thumb2 relaxations when they weren't supported, but only diagnosed the case where an actual relocation was produced. We should also tell people if local symbols aren't going to work rather than silently overflowing. llvm-svn: 249164
* [ARM] Support for ARMv6-Z / ARMv6-ZK missingArtyom Skrobov2015-09-301-4/+9
| | | | | | | | | | | | | | | As Richard Barton observed at http://reviews.llvm.org/D12937#inline-107121 TargetParser in LLVM has insufficient support for ARMv6Z and ARMv6ZK. In particular, there were no tests for TrustZone being supported in these architectures. The patch clears a FIXME: left by Saleem Abdulrasool in r201471, and fixes his test case which hadn't really been testing what it was claiming to test. Differential Revision: http://reviews.llvm.org/D13236 llvm-svn: 248921
* DI: Require subprogram definitions to be distinctDuncan P. N. Exon Smith2015-08-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | As a follow-up to r246098, require `DISubprogram` definitions (`isDefinition: true`) to be 'distinct'. Specifically, add an assembler check, a verifier check, and bitcode upgrading logic to combat testcase bitrot after the `DIBuilder` change. While working on the testcases, I realized that test/Linker/subprogram-linkonce-weak-odr.ll isn't relevant anymore. Its purpose was to check for a corner case in PR22792 where two subprogram definitions match exactly and share the same metadata node. The new verifier check, requiring that subprogram definitions are 'distinct', precludes that possibility. I updated almost all the IR with the following script: git grep -l -E -e '= !DISubprogram\(.* isDefinition: true' | grep -v test/Bitcode | xargs sed -i '' -e 's/= \(!DISubprogram(.*, isDefinition: true\)/= distinct \1/' Likely some variant of would work for out-of-tree testcases. llvm-svn: 246327
* Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCIJonathan Roelofs2015-08-101-1/+1
| | | | | | | I looked into adding a warning / error for this to FileCheck, but there doesn't seem to be a good way to avoid it triggering on the instances of it in RUN lines. llvm-svn: 244481
* If the "CodeView" module flag is set, emit codeview instead of DWARFReid Kleckner2015-08-051-1/+2
| | | | | | | | | | | | | | Summary: Emit both DWARF and CodeView if "CodeView" and "Dwarf Version" module flags are set. Reviewers: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11756 llvm-svn: 244158
* DI: Disallow uniquable DICompileUnitsDuncan P. N. Exon Smith2015-08-031-1/+1
| | | | | | | | | | | | | | | | | | Since r241097, `DIBuilder` has only created distinct `DICompileUnit`s. The backend is liable to start relying on that (if it hasn't already), so make uniquable `DICompileUnit`s illegal and automatically upgrade old bitcode. This is a nice cleanup, since we can remove an unnecessary `DenseSet` (and the associated uniquing info) from `LLVMContextImpl`. Almost all the testcases were updated with this script: git grep -e '= !DICompileUnit' -l -- test | grep -v test/Bitcode | xargs sed -i '' -e 's,= !DICompileUnit,= distinct !DICompileUnit,' I imagine something similar should work for out-of-tree testcases. llvm-svn: 243885
* [ARM] Handle commutativity when converting to tADDhirr in Thumb2Scott Douglass2015-07-132-0/+3
| | | | | | | | Also, run thumb_rewrite.s tests in Thumb2 now that they pass. Differential Revision: http://reviews.llvm.org/D11132 llvm-svn: 242036
* [ARM] Add Thumb2 ADD with SP narrowing from 3 operand to 2Scott Douglass2015-07-131-1/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D11131 llvm-svn: 242035
* [ARM] Small refactor of tryConvertingToTwoOperandForm (nfc)Scott Douglass2015-07-131-3/+77
| | | | | | | | | Also, add more Thumb2 ADD tests requested during review of http://reviews.llvm.org/D11053. Differential Revision: http://reviews.llvm.org/D11130 llvm-svn: 242034
* [ARM] Thumb1 3 to 2 operand convertion for commutative operationsScott Douglass2015-07-092-0/+19
| | | | | | Differential Revision: http://reviews.llvm.org/D11057 llvm-svn: 241802
* [ARM] Don't be overzealous converting Thumb1 3 to 2 operandsScott Douglass2015-07-091-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D11056 llvm-svn: 241801
* [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2Scott Douglass2015-07-091-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D11055 llvm-svn: 241800
* [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)Scott Douglass2015-07-091-0/+19
| | | | | | | | Also adds some test cases. Differential Revision: http://reviews.llvm.org/D11054 llvm-svn: 241799
* [ARM] Add ADD tests for Thumb2 narrowing (nfc)Scott Douglass2015-07-091-1/+67
| | | | | | Differential Revision: http://reviews.llvm.org/D11053 llvm-svn: 241798
* Reworking the test part of r241149Gabor Ballabas2015-07-021-0/+10
| | | | | | | | | The test part of r241149 has been reverted in r241451, due to misplaced test cases. This patch splits those test cases among the appropriate targets. Differential Revision: http://reviews.llvm.org/D10897 llvm-svn: 241283
* [ARM]: Extend -mfpu options for half-precision and vfpv3xdJaved Absar2015-06-291-0/+5
| | | | | | | | | | | | | | | Some of the the permissible ARM -mfpu options, which are supported in GCC, are currently not present in llvm/clang.This patch adds the options: 'neon-fp16', 'vfpv3-fp16', 'vfpv3-d16-fp16', 'vfpv3xd' and 'vfpv3xd-fp16. These are related to half-precision floating-point and single precision. Reviewers: rengolin, ranjeet.singh Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10645 llvm-svn: 240930
* Revert r240302 ("Bring r240130 back.").Daniel Jasper2015-06-231-1/+1
| | | | | | | | | | | | | This causes errors like: ld: error: blah.o: requires dynamic R_X86_64_PC32 reloc against '' which may overflow at runtime; recompile with -fPIC blah.cc:function f(): error: undefined reference to '' blah.o:g(): error: undefined reference to '' I have not yet come up with an appropriate reproduction. llvm-svn: 240394
* Change .thumb_set to have the same error checks as .set.Pete Cooper2015-06-222-2/+28
| | | | | | | | | | | | | | According to the documentation, .thumb_set is 'the equivalent of a .set directive'. We didn't have equivalent behaviour in terms of all the errors we could throw, for example, when a symbol is redefined. This change refactors parseAssignment so that it can be used by .set and .thumb_set and implements tests for .thumb_set for all the errors thrown by that method. Reviewed by Rafael Espíndola. llvm-svn: 240318
* Bring r240130 back.Rafael Espindola2015-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | Now that pr23900 is fixed, we can bring it back with no changes. Original message: Make all temporary symbols unnamed. What this does is make all symbols that would otherwise start with a .L (or L on MachO) unnamed. Some of these symbols still show up in the symbol table, but we can just make them unnamed. In order to make sure we produce identical results when going thought assembly, all .L (not just the compiler produced ones), are now unnamed. Running llc on llvm-as.opt.bc, the peak memory usage goes from 208.24MB to 205.57MB. llvm-svn: 240302
* Revert 240130, it caused crashes (repro in PR23900).Nico Weber2015-06-191-1/+1
| | | | llvm-svn: 240193
* Make all temporary symbols unnamed.Rafael Espindola2015-06-191-1/+1
| | | | | | | | | | | | | | | | What this does is make all symbols that would otherwise start with a .L (or L on MachO) unnamed. Some of these symbols still show up in the symbol table, but we can just make them unnamed. In order to make sure we produce identical results when going thought assembly, all .L (not just the compiler produced ones), are now unnamed. Running llc on llvm-as.opt.bc, the peak memory usage goes from 208.24MB to 205.57MB. llvm-svn: 240130
* Convert a few tests to use llvm-mc.Rafael Espindola2015-06-188-255/+124
| | | | llvm-svn: 240017
* [ARM] Add support for -sp- FPUs and FPU none to TargetParserJohn Brawn2015-06-051-1/+17
| | | | | | | | | | These are added mainly for the benefit of clang, but this also means that they are now allowed in .fpu directives and we emit the correct .fpu directive when single-precision-only is used. Differential Revision: http://reviews.llvm.org/D10238 llvm-svn: 239151
* Omit unused section symbols from the symbol table.Rafael Espindola2015-06-041-18/+0
| | | | | | | | | | | | | | Section symbols exist as an optimization: instead of having multiple relocations point to different symbols, many of them can point to a single section symbol. When that optimization is unused, a section symbol is also unused and adds no extra information to the object file. This saves a bit of space on the object files and makes the output of llvm-objdump -t easier to read and consequently some tests get quite a bit simpler. llvm-svn: 239045
* No need to check the raw relocation bytes if checking the parsed dump.Rafael Espindola2015-06-041-6/+2
| | | | llvm-svn: 239042
* Fix the interpretation of a 0 st_name.Rafael Espindola2015-06-031-3/+3
| | | | | | | | | | | | | | The ELF spec is very clear: ----------------------------------------------------------------------------- If the value is non-zero, it represents a string table index that gives the symbol name. Otherwise, the symbol table entry has no name. -------------------------------------------------------------------------- In particular, a st_name of 0 most certainly doesn't mean that the symbol has the same name as the section. llvm-svn: 238899
* Don't special case undefined symbol when deciding the symbol order.Rafael Espindola2015-05-282-13/+13
| | | | | | | | | ELF has no restrictions on where undefined symbols go relative to other defined symbols. In fact, gas just sorts them together. Do the same. This was there since r111174 probably just because the MachO writer has it. llvm-svn: 238513
* ARMTargetParser: Normalising build attributesRenato Golin2015-05-274-4/+4
| | | | | | | | | | | | | | | Now that most of the methods in Clang and LLVM that were parsing arch/cpu/fpu strings are using ARMTargetParser, it's time to make it a bit more conforming with what the ABI says. This commit adds some clarification on what build attributes are accepted and which are "non-standard". It also makes clear that the "defaultCPU" and "defaultArch" methods were really just build attribute getters. It also diverges from GCC's behaviour to say that armv2/armv3 are really an ARMv4 in the build attributes, when the ABI has a clear state for that: Pre-v4. llvm-svn: 238344
* [AArch64] Clean up the ELF streamer a bit.Benjamin Kramer2015-05-231-2/+2
| | | | llvm-svn: 238102
* [ARM] Fix typo in subtarget feature list for 7em tripleJohn Brawn2015-05-221-12/+22
| | | | | | | | | | | The list of subtarget features for the 7em triple contains 't2xtpk', which actually disables that subtarget feature. Correct that to '+t2xtpk' and test that the instructions enabled by that feature do actually work. Differential Revision: http://reviews.llvm.org/D9936 llvm-svn: 238022
* [DWARF] Add CIE header fields address_size and segment_size when generating ↵Keith Walker2015-05-121-0/+3
| | | | | | | | | | | | | dwarf-4 The DWARF-4 specification added 2 new fields in the CIE header called address_size and segment_size. Create these 2 new fields when generating dwarf-4 CIE entries, print out the new fields when dumping the CIE and update tests Differential Revision: http://reviews.llvm.org/D9558 llvm-svn: 237145
* Write sections mostly in one pass.Rafael Espindola2015-04-303-14/+13
| | | | | | | | | | | During ELF writing, there is no need to further relax the sections, so we should not be creating fragments. This patch avoids doing so in all cases but debug section compression (that is next). Also, the ELF format is fairly simple to write. We can do a single pass over the sections to write them out and compute the section header table. llvm-svn: 236235
* Don't check for offsets in tests where it is not relevant.Rafael Espindola2015-04-301-2/+2
| | | | llvm-svn: 236233
* Check the entire content of the comdat group.Rafael Espindola2015-04-301-5/+17
| | | | llvm-svn: 236230
* Write the section header string table directly to the output stream.Rafael Espindola2015-04-295-30/+31
| | | | | | | | | | Instead of accumulating the content in a fragment first, just write it to the output stream. Also put it first in the section table, so that we never have to worry about its index being >= SHN_LORESERVE. llvm-svn: 236145
* IR: Give 'DI' prefix to debug info metadataDuncan P. N. Exon Smith2015-04-291-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Finish off PR23080 by renaming the debug info IR constructs from `MD*` to `DI*`. The last of the `DIDescriptor` classes were deleted in r235356, and the last of the related typedefs removed in r235413, so this has all baked for about a week. Note: If you have out-of-tree code (like a frontend), I recommend that you get everything compiling and tests passing with the *previous* commit before updating to this one. It'll be easier to keep track of what code is using the `DIDescriptor` hierarchy and what you've already updated, and I think you're extremely unlikely to insert bugs. YMMV of course. Back to *this* commit: I did this using the rename-md-di-nodes.sh upgrade script I've attached to PR23080 (both code and testcases) and filtered through clang-format-diff.py. I edited the tests for test/Assembler/invalid-generic-debug-node-*.ll by hand since the columns were off-by-three. It should work on your out-of-tree testcases (and code, if you've followed the advice in the previous paragraph). Some of the tests are in badly named files now (e.g., test/Assembler/invalid-mdcompositetype-missing-tag.ll should be 'dicompositetype'); I'll come back and move the files in a follow-up commit. llvm-svn: 236120
* Don't constrain the section order in tests that don't depend on it.Rafael Espindola2015-04-294-13/+13
| | | | llvm-svn: 236102
* [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.Ahmed Bougacha2015-04-281-1/+1
| | | | | | | | | | This matches other assemblers and is less unexpected (e.g. PR23227). On ELF, I tried binutils gas v2.24 and nasm 2.10.09, and they both agree on LShr. On COFF, I couldn't get my hands on an assembler yet, so don't change the behavior. For now, don't change it on non-AArch64 Darwin either, as the other assembler is gas v1.38, which does an AShr. llvm-svn: 235963
* ARM: When spilling extra registers for alignment, prefer low registers on ↵Peter Collingbourne2015-04-231-2/+2
| | | | | | | | | | | all Thumb targets. This makes it more likely that we can use the 16-bit push and pop instructions on Thumb-2, saving around 4 bytes per function. Differential Revision: http://reviews.llvm.org/D9165 llvm-svn: 235637
* ARM: Only enforce 4-byte alignment on Thumb-2 functions with constant pools.Peter Collingbourne2015-04-231-2/+2
| | | | | | | | | | | | | | | | | This appears to have been introduced back in r76698 as part of an unrelated change. I can find no official ARM documentation stating that Thumb-2 functions require 4-byte alignment; in fact, ARM documentation appears to contradict this (see, e.g., ARM Architecture Reference Manual Thumb-2 Supplement, section 2.6.1: "Thumb-2 enforces 16-bit alignment on all instructions."). Also remove code that sets alignment for ARM functions, which is redundant with code in the MachineFunction constructor, and remove the hidden -arm-align-constant-islands flag, which has been enabled by default since r146739 (Dec 2011) and has probably received sufficient testing by now. Differential Revision: http://reviews.llvm.org/D9138 llvm-svn: 235636
* Re-commit r235560: Switch lowering: extract jump tables and bit tests before ↵Hans Wennborg2015-04-231-88/+11
| | | | | | | | | | | building binary tree (PR22262) Third time's the charm. The previous commit was reverted as a reverse for-loop in SelectionDAGBuilder::lowerWorkItem did 'I--' on an iterator at the beginning of a vector, causing asserts when using debugging iterators. This commit fixes that. llvm-svn: 235608
* Revert r235560; this commit was causing several failed assertions in Debug ↵Aaron Ballman2015-04-231-11/+88
| | | | | | builds using MSVC's STL. The iterator is being used outside of its valid range. llvm-svn: 235597
* Switch lowering: extract jump tables and bit tests before building binary ↵Hans Wennborg2015-04-221-88/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tree (PR22262) This is a re-commit of r235101, which also fixes the problems with the previous patch: - Switches with only a default case and non-fallthrough were handled incorrectly - The previous patch tickled a bug in PowerPC Early-Return Creation which is fixed here. > This is a major rewrite of the SelectionDAG switch lowering. The previous code > would lower switches as a binary tre, discovering clusters of cases > suitable for lowering by jump tables or bit tests as it went along. To increase > the likelihood of finding jump tables, the binary tree pivot was selected to > maximize case density on both sides of the pivot. > > By not selecting the pivot in the middle, the binary trees would not always > be balanced, leading to performance problems in the generated code. > > This patch rewrites the lowering to search for clusters of cases > suitable for jump tables or bit tests first, and then builds the binary > tree around those clusters. This way, the binary tree will always be balanced. > > This has the added benefit of decoupling the different aspects of the lowering: > tree building and jump table or bit tests finding are now easier to tweak > separately. > > For example, this will enable us to balance the tree based on profile info > in the future. > > The algorithm for finding jump tables is quadratic, whereas the previous algorithm > was O(n log n) for common cases, and quadratic only in the worst-case. This > doesn't seem to be major problem in practice, e.g. compiling a file consisting > of a 10k-case switch was only 30% slower, and such large switches should be rare > in practice. Compiling e.g. gcc.c showed no compile-time difference. If this > does turn out to be a problem, we could limit the search space of the algorithm. > > This commit also disables all optimizations during switch lowering in -O0. > > Differential Revision: http://reviews.llvm.org/D8649 llvm-svn: 235560
* Write relocation sections contiguously.Rafael Espindola2015-04-173-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linkers normally read all the relocations upfront to compute the references between sections. Putting them together is a bit more cache friendly. I benchmarked linking a Release+Asserts clang with gold on a vm. I tried all 4 combinations of --gc-sections/no --gc-section hot and cold cache. I cleared the cache with echo 3 > /proc/sys/vm/drop_caches and warmed it up by running the link once before timing the subsequent ones. With cold cache and --gc-sections the time goes from 1.86130781665 +- 0.01713126697463843 seconds to 1.82370735105 +- 0.014127522318814516 seconds With cold cache and no --gc-sections the time goes from 1.6087245435500002 +- 0.012999066825178644 seconds to 1.5687122041500001 +- 0.013145850126026619 seconds With hot cache and no --gc-sections the time goes from 0.926200939 ( +- 0.33% ) seconds to 0.907200079 ( +- 0.31% ) seconds With hot cache and gc sections the time goes from 1.183038049 ( +- 0.34% ) seconds to 1.147355862 ( +- 0.39% ) seconds llvm-svn: 235165
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-04-162-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the call instruction See r230786 and r230794 for similar changes to gep and load respectively. Call is a bit different because it often doesn't have a single explicit type - usually the type is deduced from the arguments, and just the return type is explicit. In those cases there's no need to change the IR. When that's not the case, the IR usually contains the pointer type of the first operand - but since typed pointers are going away, that representation is insufficient so I'm just stripping the "pointerness" of the explicit type away. This does make the IR a bit weird - it /sort of/ reads like the type of the first operand: "call void () %x(" but %x is actually of type "void ()*" and will eventually be just of type "ptr". But this seems not too bad and I don't think it would benefit from repeating the type ("void (), void () * %x(" and then eventually "void (), ptr %x(") as has been done with gep and load. This also has a side benefit: since the explicit type is no longer a pointer, there's no ambiguity between an explicit type and a function that returns a function pointer. Previously this case needed an explicit type (eg: a function returning a void() function was written as "call void () () * @x(" rather than "call void () * @x(" because of the ambiguity between a function returning a pointer to a void() function and a function returning void). No ambiguity means even function pointer return types can just be written alone, without writing the whole function's type. This leaves /only/ the varargs case where the explicit type is required. Given the special type syntax in call instructions, the regex-fu used for migration was a bit more involved in its own unique way (as every one of these is) so here it is. Use it in conjunction with the apply.sh script and associated find/xargs commands I've provided in rr230786 to migrate your out of tree tests. Do let me know if any of this doesn't cover your cases & we can iterate on a more general script/regexes to help others with out of tree tests. About 9 test cases couldn't be automatically migrated - half of those were functions returning function pointers, where I just had to manually delete the function argument types now that we didn't need an explicit function type there. The other half were typedefs of function types used in calls - just had to manually drop the * from those. import fileinput import sys import re pat = re.compile(r'((?:=|:|^|\s)call\s(?:[^@]*?))(\s*$|\s*(?:(?:\[\[[a-zA-Z0-9_]+\]\]|[@%](?:(")?[\\\?@a-zA-Z0-9_.]*?(?(3)"|)|{{.*}}))(?:\(|$)|undef|inttoptr|bitcast|null|asm).*$)') addrspace_end = re.compile(r"addrspace\(\d+\)\s*\*$") func_end = re.compile("(?:void.*|\)\s*)\*$") def conv(match, line): if not match or re.search(addrspace_end, match.group(1)) or not re.search(func_end, match.group(1)): return line return line[:match.start()] + match.group(1)[:match.group(1).rfind('*')].rstrip() + match.group(2) + line[match.end():] for line in sys.stdin: sys.stdout.write(conv(re.search(pat, line), line)) llvm-svn: 235145
* Revert the switch lowering change (r235101, r235103, r235106)Hans Wennborg2015-04-161-11/+88
| | | | | | Looks like it broke the sanitizer-ppc64-linux1 build. Reverting for now. llvm-svn: 235108
* Switch lowering: extract jump tables and bit tests before building binary ↵Hans Wennborg2015-04-161-88/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tree (PR22262) This is a major rewrite of the SelectionDAG switch lowering. The previous code would lower switches as a binary tre, discovering clusters of cases suitable for lowering by jump tables or bit tests as it went along. To increase the likelihood of finding jump tables, the binary tree pivot was selected to maximize case density on both sides of the pivot. By not selecting the pivot in the middle, the binary trees would not always be balanced, leading to performance problems in the generated code. This patch rewrites the lowering to search for clusters of cases suitable for jump tables or bit tests first, and then builds the binary tree around those clusters. This way, the binary tree will always be balanced. This has the added benefit of decoupling the different aspects of the lowering: tree building and jump table or bit tests finding are now easier to tweak separately. For example, this will enable us to balance the tree based on profile info in the future. The algorithm for finding jump tables is O(n^2), whereas the previous algorithm was O(n log n) for common cases, and quadratic only in the worst-case. This doesn't seem to be major problem in practice, e.g. compiling a file consisting of a 10k-case switch was only 30% slower, and such large switches should be rare in practice. Compiling e.g. gcc.c showed no compile-time difference. If this does turn out to be a problem, we could limit the search space of the algorithm. This commit also disables all optimizations during switch lowering in -O0. Differential Revision: http://reviews.llvm.org/D8649 llvm-svn: 235101
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