| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ARM: improve instruction validation for thumb mode | Saleem Abdulrasool | 2014-12-18 | 1 | -3/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Architecture Reference Manual states the following: LDM{,IA,DB}: The SP cannot be in the list. The PC can be in the list. If the PC is in the list: • the LR must not be in the list • the instruction must be either outside any IT block, or the last instruction in an IT block. POP: The PC can be in the list. If the PC is in the list: • the LR must not be in the list • the instruction must be either outside any IT block, or the last instruction in an IT block. PUSH: The SP and PC can be in the list in ARM instructions, but not in Thumb instructions. STM:{,IA,DB}: The SP and PC can be in the list in ARM instructions, but not in Thumb instructions. llvm-svn: 224502 | ||||
| * | Revert "[Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list ↵ | Rafael Espindola | 2014-12-04 | 1 | -4/+3 |
| | | | | | | | | | | | for PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090>" This reverts commit r223356. It was failing check-all (MC/ARM/thumb.s in particular). llvm-svn: 223363 | ||||
| * | [Thumb/Thumb2] Added restrictions on PC, LR, SP in the register list for ↵ | Jyoti Allur | 2014-12-04 | 1 | -3/+4 |
| | | | | | | | PUSH/POP/LDM/STM. <Differential Revision: http://reviews.llvm.org/D6090> llvm-svn: 223356 | ||||
| * | [ARM] Handling for coprocessor instructions that are undefined starting from ↵ | Artyom Skrobov | 2013-11-08 | 1 | -2992/+16 |
| | | | | | | | ARMv8 (Thumb encodings) llvm-svn: 194263 | ||||
| * | [ARM] Warn on deprecated IT blocks in v8 AArch32 assembly. | Amara Emerson | 2013-10-03 | 1 | -0/+9715 |
| Patch by Artyom Skrobov. llvm-svn: 191885 | |||||

