| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Tidy up. These tests are covered in the .s file tests now. | Jim Grosbach | 2011-10-03 | 1 | -236/+0 |
| | | | | | llvm-svn: 141047 | ||||
| * | Simplify printing of ARM shifted immediates. | Jim Grosbach | 2011-07-11 | 1 | -4/+3 |
| | | | | | | | | | | Print shifted immediate values directly rather than as a payload+shifter value pair. This makes for more readable output assembly code, simplifies the instruction printer, and is consistent with how Thumb immediates are displayed. llvm-svn: 134902 | ||||
| * | Explicitly request -join-physregs for some tests that depend on it. | Jakob Stoklund Olesen | 2011-05-04 | 1 | -1/+1 |
| | | | | | llvm-svn: 130855 | ||||
| * | Constants with multiple encodings (ARM): | Johnny Chen | 2011-04-05 | 1 | -3/+3 |
| | | | | | | | | | | | An alternative syntax is available for a modified immediate constant that permits the programmer to specify the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where: <byte> is the numeric value of abcdefgh, in the range 0-255 <rot> is twice the numeric value of rotation, an even number in the range 0-30. llvm-svn: 128897 | ||||
| * | Roll r127459 back in: | Cameron Zwarich | 2011-03-11 | 1 | -1/+1 |
| | | | | | | | | | | | | Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. llvm-svn: 127498 | ||||
| * | Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get | Daniel Dunbar | 2011-03-11 | 1 | -1/+1 |
| | | | | | | | created from the", it broke some GCC test suite tests. llvm-svn: 127477 | ||||
| * | Optimize trivial branches in CodeGenPrepare, which often get created from the | Cameron Zwarich | 2011-03-11 | 1 | -1/+1 |
| | | | | | | | | | | | lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. llvm-svn: 127459 | ||||
| * | Add encoding for ARM "trap" instruction. | Bill Wendling | 2010-11-21 | 1 | -1/+1 |
| | | | | | llvm-svn: 119938 | ||||
| * | Add a CMP test. | Jim Grosbach | 2010-10-22 | 1 | -0/+9 |
| | | | | | llvm-svn: 117187 | ||||
| * | tidy up. | Jim Grosbach | 2010-10-22 | 1 | -25/+13 |
| | | | | | llvm-svn: 117166 | ||||
| * | ARM mode encoding information for CLZ, RBIT, REV*, and PKH*. | Jim Grosbach | 2010-10-22 | 1 | -1/+56 |
| | | | | | llvm-svn: 117165 | ||||
| * | Add the encoding information for the rest of the ARM mode multiply instructions. | Jim Grosbach | 2010-10-22 | 1 | -1/+3 |
| | | | | | llvm-svn: 117133 | ||||
| * | More ARM multiply instuction binary encodings. | Jim Grosbach | 2010-10-22 | 1 | -0/+30 |
| | | | | | llvm-svn: 117121 | ||||
| * | More ARM multiply instruction encoding information. | Jim Grosbach | 2010-10-22 | 1 | -0/+22 |
| | | | | | llvm-svn: 117108 | ||||
| * | ARM binary encodings for MVN variants. | Jim Grosbach | 2010-10-21 | 1 | -1/+8 |
| | | | | | llvm-svn: 117076 | ||||
| * | ARM Binary encoding information for BFC/BFI instructions. | Jim Grosbach | 2010-10-21 | 1 | -0/+7 |
| | | | | | llvm-svn: 117072 | ||||
| * | ARM mode encoding information for UBFX and SBFX instructions. | Jim Grosbach | 2010-10-15 | 1 | -0/+15 |
| | | | | | llvm-svn: 116588 | ||||
| * | Simplify test file a bit. | Jim Grosbach | 2010-10-14 | 1 | -10/+10 |
| | | | | | llvm-svn: 116540 | ||||
| * | Add testcase for RRX and ASRS (which effectively tests MOVs, since those | Jim Grosbach | 2010-10-14 | 1 | -0/+8 |
| | | | | | | | are just forms of that instruction). llvm-svn: 116538 | ||||
| * | MOVi16 and MOVT ARM mode encodings. | Jim Grosbach | 2010-10-14 | 1 | -0/+17 |
| | | | | | llvm-svn: 116498 | ||||
| * | Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. | Jim Grosbach | 2010-10-13 | 1 | -0/+10 |
| | | | | | llvm-svn: 116421 | ||||
| * | Add ARM mode operand encoding information for ADDE/SUBE instructions. | Jim Grosbach | 2010-10-13 | 1 | -0/+9 |
| | | | | | llvm-svn: 116412 | ||||
| * | Add ARM encoding information for comparisons, forced-cc-out arithmetics, and | Jim Grosbach | 2010-10-13 | 1 | -1/+10 |
| | | | | | | | arithmetic-with-carry-in instructions. llvm-svn: 116384 | ||||
| * | Be nitpicky and line up the comments. | Jim Grosbach | 2010-10-12 | 1 | -2/+2 |
| | | | | | llvm-svn: 116365 | ||||
| * | Add encoding information for the remainder of the generic arithmetic | Jim Grosbach | 2010-10-12 | 1 | -0/+11 |
| | | | | | | | ARM instructions. llvm-svn: 116313 | ||||
| * | MC machine encoding for simple aritmetic instructions that use a shifted | Jim Grosbach | 2010-10-11 | 1 | -4/+16 |
| | | | | | | | register operand. llvm-svn: 116259 | ||||
| * | Implement a few more binary encoding bits. Still very early stage proof-of- | Jim Grosbach | 2010-10-08 | 1 | -1/+9 |
| | | | | | | | | | | | concept level stuff at this point, but it is generally working for those instructions that know how to map the operands. This patch fills in the register operands for add/sub/or/etc instructions and adds the conditional execution predicate encoding. llvm-svn: 116112 | ||||
| * | Add test file for simple ARM binary encodings with MC | Jim Grosbach | 2010-10-08 | 1 | -0/+18 |
| llvm-svn: 116024 | |||||
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|