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* [ARM] Fixup tests to take into account mov translation. NFC.Renato Golin2016-05-121-10/+10
| | | | | | | | | | | | | Alter instances in the test-suite that use immediates that can be represented in the immediate field of a MOV. The reason for doing this is that when the LDR rt,=imm transformation to MOV rt, imm the existing tests do not need to be modified. Required by the patch that fixes PR25722. Patch by Peter Smith. llvm-svn: 269353
* Followup to 258750; update all MC tests to use .p2align .Dan Gohman2016-01-261-6/+6
| | | | llvm-svn: 258754
* MC: support different sized constants in constant poolsDavid Peixotto2014-07-181-6/+6
| | | | | | | | | | | | | | | On AArch64 the pseudo instruction ldr <reg>, =... supports both 32-bit and 64-bit constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully. Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers. Patch by Janne Grunau! Differential Revision: http://reviews.llvm.org/D4279 llvm-svn: 213387
* Implement the .ltorg directive for ARM assemblyDavid Peixotto2013-12-191-0/+151
This directive will write out the assembler-maintained constant pool for the current section. These constant pools are created to support the ldr-pseudo instruction (e.g. ldr r0, =val). The directive can be used by the programmer to place the constant pool in a location that can be reached by a pc-relative offset in the ldr instruction. llvm-svn: 197711
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