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* Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to workBill Wendling2010-11-021-7/+2
| | | | | | | | with immediates up to 16-bits in size. The same logic is applied to other LDR encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in VLDR's case). Removing the "12" allows it to be more generic. llvm-svn: 118094
* Mark ARM subtarget features that are available for the assembler.Jim Grosbach2010-11-011-1/+1
| | | | llvm-svn: 117929
* add simple support for addrmode5 operands, allowingChris Lattner2010-10-291-0/+4
| | | | | | | vldr.64 to work. I have no idea if this is fully right, but it is in the right direction. llvm-svn: 117626
* most simple arm instructions match correctly now,Chris Lattner2010-10-281-0/+5
| | | | | | it looks like we're not handling [] operands though llvm-svn: 117607
* fix the asmmatcher generator to handle targets with no RegisterPrefixChris Lattner2010-10-281-1/+6
| | | | | | | (like ARM) correctly. With this change, we can now match "bx lr" because we recognize lr as a register. llvm-svn: 117606
* move ARM MC tests up one level.Chris Lattner2010-10-021-0/+8
llvm-svn: 115414
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