summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/ARM/arm-thumb-trustzone.s
Commit message (Collapse)AuthorAgeFilesLines
* [ARM] Diagnose PC-writing instructions in IT blocksOliver Stannard2017-02-281-2/+2
| | | | | | | | | | | | In Thumb2, instructions which write to the PC are UNPREDICTABLE if they are in an IT block but not the last instruction in the block. Previously, we only diagnosed this for LDM instructions, this patch extends the diagnostic to cover all of the relevant instructions. Differential Revision: https://reviews.llvm.org/D30398 llvm-svn: 296459
* Recognize that ARM1176JZ[F]-S support TrustZoneArtyom Skrobov2015-10-291-0/+1
| | | | | | | | | | | | | | Summary: ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic (the old name for SMC, as defined in ARMv6KZ) wasn't supported. Reviewers: jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14154 llvm-svn: 251627
* Prefix failing commands with not to make clear they are expected to fail.Rafael Espindola2013-07-031-1/+1
| | | | llvm-svn: 185554
* ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.Tim Northover2013-04-101-0/+25
These instructions aren't universally available, but depend on a specific extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new feature is appropriate. This also enables the feature by default on A-class cores which usually have these extensions, to avoid breaking existing code and act as a sensible default. llvm-svn: 179171
OpenPOWER on IntegriCloud