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path: root/llvm/test/MC/AMDGPU/smrd.s
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* AMDGPU: Remove -mcpu=SIMatt Arsenault2017-08-071-2/+2
* AMDGPU: Allow TBA, TMA, TTMP* registers with SMEM instructionsMatt Arsenault2016-12-091-4/+68
* [AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.Artem Tamazov2016-10-311-1/+16
* [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modif...Sam Kolton2016-05-231-6/+6
* Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov2016-04-291-0/+12
* Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier2016-04-271-12/+0
* [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov2016-04-271-0/+12
* [AMDGPU] Assembler: SOP* instruction fixesNikolay Haustov2016-03-141-3/+55
* [AMDGPU] Fix SMEM instructions encoding/operand namingsValery Pykhtin2016-03-101-0/+22
* AMDGPU: Implement readcyclecounterMatt Arsenault2016-02-271-0/+3
* AMDGPU: Fix asserts on invalid register rangesMatt Arsenault2015-11-031-0/+9
* AMDGPU: Add s_dcache_* instructionsMatt Arsenault2015-09-241-0/+7
* AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CITom Stellard2015-08-061-12/+33
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+32
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