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path: root/llvm/test/MC/AMDGPU/reg-syntax-extra.s
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* [AMDGPU][MC][GFX10] Enabled null with 64-bit operandsDmitry Preobrazhensky2019-09-021-0/+8
* [AMDGPU] gfx1010 VOP3 and VOP3P implementationStanislav Mekhanoshin2019-04-261-2/+11
* AMDGPU: Remove -mcpu=SIMatt Arsenault2017-08-071-2/+2
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-091-1/+1
* [AMDGPU][llvm-mc] Square-braced-syntax for registers - make ":expr2" optional.Artem Tamazov2016-05-271-0/+29
* Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov2016-04-291-0/+28
* AMDGPU/SI: Assembler: Unify parsing/printing of operands.Nikolay Haustov2016-04-291-3/+3
* Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier2016-04-271-28/+0
* [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov2016-04-271-0/+28
* AMDGPU/SI: Add test missed in rL266865Nikolay Haustov2016-04-221-0/+55
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