| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | R600/SI: Default to no single precision denormals. | Matt Arsenault | 2014-07-14 | 1 | -1/+1 |
| * | CodeGen: Stick constant pool entries in COMDAT sections for WinCOFF | David Majnemer | 2014-07-14 | 2 | -5/+55 |
| * | [DAGCombiner] Add more rules to combine shuffle vector dag nodes. | Andrea Di Biagio | 2014-07-14 | 1 | -0/+373 |
| * | Unify the lowering of arguments during SjLj prepare. | Bill Wendling | 2014-07-14 | 1 | -1/+1 |
| * | X86: correct 64-bit atomics on 32-bit | Saleem Abdulrasool | 2014-07-14 | 1 | -0/+1 |
| * | X86: remove temporary atomicrmw used during lowering. | Tim Northover | 2014-07-14 | 1 | -0/+1 |
| * | [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mt... | Daniel Sanders | 2014-07-14 | 2 | -48/+324 |
| * | [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-07-14 | 3 | -161/+169 |
| * | AArch64: remove unnecessary pseudo-instruction. | Tim Northover | 2014-07-14 | 1 | -2/+2 |
| * | [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is | Sasa Stankovic | 2014-07-14 | 2 | -1/+142 |
| * | Support lowering of empty aggregates. | Bill Wendling | 2014-07-14 | 1 | -0/+31 |
| * | [DAGCombiner] Fix a crash caused by a missing check for legal type when tryin... | Andrea Di Biagio | 2014-07-13 | 1 | -0/+30 |
| * | R600: Run more tests with promote alloca disabled. | Matt Arsenault | 2014-07-13 | 4 | -22/+57 |
| * | R600: Run private-memory test with and without alloca promote | Matt Arsenault | 2014-07-13 | 1 | -24/+33 |
| * | AArch64: add support for llvm.aarch64.hint intrinsic | Saleem Abdulrasool | 2014-07-12 | 1 | -0/+67 |
| * | R600: Add missing tests for some intrinsics | Matt Arsenault | 2014-07-12 | 7 | -5/+109 |
| * | [PowerPC] Fix invalid displacement created by LocalStackAlloc | Ulrich Weigand | 2014-07-11 | 1 | -0/+71 |
| * | R600/SI: Use i32 vectors for resources and samplers | Marek Olsak | 2014-07-11 | 3 | -86/+86 |
| * | R600/SI: add sample and image intrinsics exposing all instruction fields | Marek Olsak | 2014-07-11 | 3 | -0/+627 |
| * | ARM: Allow __fp16 as a function arg or return type for AArch64 | Oliver Stannard | 2014-07-11 | 1 | -0/+14 |
| * | [X86] Fix the inversion of low and high bits for the lowering of MUL_LOHI. | Quentin Colombet | 2014-07-11 | 1 | -3/+0 |
| * | R600: Implement float to long/ulong | Jan Vesely | 2014-07-10 | 3 | -49/+386 |
| * | [mips] Emit two CFI offset directives per double precision SDC1/LDC1 | Zoran Jovanovic | 2014-07-10 | 2 | -0/+54 |
| * | Extend the test coverage in combine-vec-shuffle-2.ll adding some negative tests. | Andrea Di Biagio | 2014-07-10 | 1 | -0/+89 |
| * | Revert "Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (t... | Matt Arsenault | 2014-07-10 | 3 | -2/+45 |
| * | [DAG] Further improve the logic in DAGCombiner that folds a pair of shuffles ... | Andrea Di Biagio | 2014-07-10 | 2 | -1/+167 |
| * | [X86] Mark pseudo instruction TEST8ri_NOEREX as hasSIdeEffects=0. | Akira Hatanaka | 2014-07-10 | 1 | -0/+20 |
| * | [mips] Added FPXX modeless calling convention. | Zoran Jovanovic | 2014-07-10 | 2 | -0/+82 |
| * | AArch64: correctly fast-isel i8 & i16 multiplies | Tim Northover | 2014-07-10 | 1 | -0/+40 |
| * | [mips] Add support for -modd-spreg/-mno-odd-spreg | Daniel Sanders | 2014-07-10 | 1 | -0/+54 |
| * | [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous | Chandler Carruth | 2014-07-10 | 1 | -0/+18 |
| * | llvm/test/CodeGen/X86/shift-parts.ll: FileCheck-ize. (from r212640) | NAKAMURA Takumi | 2014-07-10 | 1 | -1/+3 |
| * | Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) ... | NAKAMURA Takumi | 2014-07-10 | 2 | -40/+3 |
| * | [x86] Add another combine that is particularly useful for the new vector | Chandler Carruth | 2014-07-10 | 1 | -3/+11 |
| * | Make it possible for ints/floats to return different values from getBooleanCo... | Daniel Sanders | 2014-07-10 | 2 | -80/+124 |
| * | [x86] Expand the target DAG combining for PSHUFD nodes to be able to | Chandler Carruth | 2014-07-10 | 1 | -4/+1 |
| * | [x86] Tweak the v16i8 single input special case lowering for shuffles | Chandler Carruth | 2014-07-10 | 1 | -11/+7 |
| * | [x86] Initial improvements to the new shuffle lowering for v16i8 | Chandler Carruth | 2014-07-10 | 1 | -17/+21 |
| * | [AArch64]Fix an assertion failure in DAG Combiner about concating 2 build_vec... | Hao Liu | 2014-07-10 | 1 | -1/+15 |
| * | R600/SI: Add support for llvm.convert.{to|from}.fp16 | Matt Arsenault | 2014-07-10 | 2 | -0/+28 |
| * | Recommit r212203: Don't try to construct debug LexicalScopes hierarchy for fu... | David Blaikie | 2014-07-09 | 2 | -38/+133 |
| * | Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine. | Matt Arsenault | 2014-07-09 | 2 | -3/+40 |
| * | AArch64: Better codegen for storing to __fp16. | Jim Grosbach | 2014-07-09 | 1 | -0/+126 |
| * | [x86] Fix a bug in my new zext-vector-inreg DAG trickery where we were | Chandler Carruth | 2014-07-09 | 1 | -0/+9 |
| * | X86: When lowering v8i32 himuls use the correct shuffle masks for AVX2. | Benjamin Kramer | 2014-07-09 | 1 | -19/+23 |
| * | [x86] Add a ZERO_EXTEND_VECTOR_INREG DAG node and use it when widening | Chandler Carruth | 2014-07-09 | 1 | -0/+18 |
| * | [mips][mips64r6] Correct select patterns that have the condition or true/fals... | Daniel Sanders | 2014-07-09 | 4 | -79/+79 |
| * | [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions | Daniel Sanders | 2014-07-09 | 3 | -37/+37 |
| * | [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not a... | Daniel Sanders | 2014-07-09 | 2 | -11/+24 |
| * | [mips][mips64r6] Use JALR for returns instead of JR (which is not available o... | Daniel Sanders | 2014-07-09 | 3 | -34/+80 |
