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* revert my previous patches that introduced an additional parameter to the obj...Nuno Lopes2012-05-227-31/+15
* Only erase virtregs with no uses left.Jakob Stoklund Olesen2012-05-221-0/+118
* FileCheck'ize test, and add a bit to test for r157221.Jim Grosbach2012-05-211-1/+7
* Allow 256-bit shuffles to still be split even if only half of the shuffle com...Craig Topper2012-05-211-6/+15
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-201-0/+18
* Add a missing PPC 64-bit stwu pattern.Hal Finkel2012-05-201-0/+28
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-201-2/+2
* Transfer memory operands to the right instruction.Jakob Stoklund Olesen2012-05-201-4/+4
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-2/+2
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-201-1/+1
* Fix 12892.Jakob Stoklund Olesen2012-05-191-0/+122
* Erase joined copies immediately.Jakob Stoklund Olesen2012-05-191-6/+6
* On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem2012-05-191-0/+14
* Add support for additional in-reg vbroadcast patternsNadav Rotem2012-05-191-0/+37
* Add support for the 'd' mips inline asm output modifier.Eric Christopher2012-05-191-0/+6
* Refactor data-in-code annotations.Jim Grosbach2012-05-182-1/+45
* Add support for the mips 'x' inline asm modifier.Eric Christopher2012-05-181-0/+6
* Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper2012-05-182-5/+6
* Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng2012-05-181-0/+16
* Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen2012-05-181-12/+1
* Remove -join-physregs from the test suite.Jakob Stoklund Olesen2012-05-1717-232/+227
* Remove incorrect pattern for ARM SMML instruction.Tim Northover2012-05-171-0/+13
* Avoid creating a cycle when folding load / op with flag / store. PR11451474. ...Evan Cheng2012-05-161-0/+46
* Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen2012-05-151-0/+68
* Enable all Hexagon tests.Sirish Pande2012-05-1511-28/+18
* Fix PR12821.Jakob Stoklund Olesen2012-05-141-1/+33
* Revert 156634 upon request until code improvement changes are made.Brendon Cahoon2012-05-142-74/+4
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-141-2/+2
* Support for Hexagon feature, New Value Jump.Sirish Pande2012-05-122-0/+63
* Fix test cases.Akira Hatanaka2012-05-1213-76/+76
* Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka2012-05-122-5/+5
* Insert instructions to the entry basic block which initializes the globalAkira Hatanaka2012-05-121-2/+2
* Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka2012-05-111-0/+16
* Use regular expression to match register names. Akira Hatanaka2012-05-111-1/+1
* [fast-isel] Add support for selecting @llvm.trap().Chad Rosier2012-05-111-0/+12
* Hexagon constant extender support.Brendon Cahoon2012-05-112-4/+74
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier2012-05-111-1/+1
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-111-0/+17
* Fix test/CodeGen/X86/tls-pie.ll.Hans Wennborg2012-05-111-1/+1
* Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg2012-05-111-4/+13
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-111-0/+34
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-111-2/+14
* Add support for the 'X' inline asm operand modifier.Eric Christopher2012-05-101-0/+15
* Hexagon V5 FP Support.Sirish Pande2012-05-1015-0/+343
* Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren2012-05-101-34/+0
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-101-0/+34
* AVX2: Add an additional broadcast idiom.Nadav Rotem2012-05-101-0/+12
* Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in t...Nadav Rotem2012-05-101-0/+17
* Added a regress test for the bug #9964 before close it.Danil Malyshev2012-05-091-0/+9
* change the objectsize intrinsic signature: add a 3rd parameter to denote the ...Nuno Lopes2012-05-097-15/+31
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