| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Make NaCl's use of .init_array for static constructors match Linux | Derek Schuff | 2015-03-11 | 1 | -0/+8 |
| * | [CodeGenPrepare] Refine the cost model provided by the promotion helper. | Quentin Colombet | 2015-03-10 | 2 | -3/+32 |
| * | Add support for part-word atomics for PPC | Nemanja Ivanovic | 2015-03-10 | 1 | -0/+54 |
| * | [AArch64] Avoid going through GPRs for across-vector instructions. | Ahmed Bougacha | 2015-03-10 | 5 | -5/+450 |
| * | Change the generation of the vmuluwm instruction to be based on the MUL opcode. | Kit Barton | 2015-03-10 | 2 | -5/+6 |
| * | Teach lowering to correctly handle invoke statepoint and gc results tied to t... | Igor Laevsky | 2015-03-10 | 1 | -0/+38 |
| * | [X86, AVX] replace vinsertf128 intrinsics with generic shuffles | Sanjay Patel | 2015-03-10 | 4 | -107/+47 |
| * | [Hexagon] Removing unused patterns. | Colin LeMahieu | 2015-03-09 | 1 | -3/+2 |
| * | [CodeGen] Replace the reused stores' chain for extractelt expansion. | Ahmed Bougacha | 2015-03-09 | 2 | -122/+185 |
| * | [X86] Add nounwind to vector-idiv.ll testcases. NFC. | Ahmed Bougacha | 2015-03-09 | 1 | -13/+15 |
| * | Reland r229944: EH: Prune unreachable resume instructions during Dwarf EH pre... | Reid Kleckner | 2015-03-09 | 5 | -6/+118 |
| * | [Hexagon] Reapply r231699. Remove assumption that second operand is an immed... | Colin LeMahieu | 2015-03-09 | 1 | -1/+2 |
| * | [Hexagon] Reverting r231699 | Colin LeMahieu | 2015-03-09 | 1 | -2/+1 |
| * | [Hexagon] Updating constant set to simpler versions. | Colin LeMahieu | 2015-03-09 | 1 | -1/+2 |
| * | [Hexagon] Eliminating immediate condition set. | Colin LeMahieu | 2015-03-09 | 3 | -0/+3 |
| * | Print jump tables before exception tables. | Rafael Espindola | 2015-03-09 | 1 | -3/+5 |
| * | Add logical ops to Mips fast-isel | Reed Kotler | 2015-03-09 | 1 | -0/+605 |
| * | R600/SI: Limit SGPRs to 80 on Tonga and Iceland | Marek Olsak | 2015-03-09 | 1 | -3/+6 |
| * | Fix line ending in test CodeGen/X86/pr22774.ll. NFC. | Andrea Di Biagio | 2015-03-09 | 1 | -4/+1 |
| * | [X86][AVX] Fix wrong lowering of VPERM2X128 nodes | Andrea Di Biagio | 2015-03-08 | 2 | -8/+77 |
| * | [DAGCombiner] Fix wrong folding of AND dag nodes. | Andrea Di Biagio | 2015-03-07 | 1 | -0/+15 |
| * | [DAGCombiner] SCALAR_TO_VECTOR(EXTRACT_VECTOR_ELT(V,C)) -> VECTOR_SHUFFLE | Simon Pilgrim | 2015-03-07 | 2 | -7/+4 |
| * | Remove use of misched-bench from this test and replace it with | Eric Christopher | 2015-03-07 | 1 | -1/+1 |
| * | Recommit r231324 with a fix to the ARM execution domain code | Eric Christopher | 2015-03-07 | 1 | -0/+4 |
| * | [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. | Quentin Colombet | 2015-03-06 | 1 | -0/+94 |
| * | fixed to test features, not CPUs | Sanjay Patel | 2015-03-06 | 1 | -3/+3 |
| * | fixed to test features, not CPUs | Sanjay Patel | 2015-03-06 | 1 | -2/+2 |
| * | loosen checking for buildbots | Sanjay Patel | 2015-03-06 | 1 | -2/+1 |
| * | fixed to test only the feature, not the feature and a CPU | Sanjay Patel | 2015-03-06 | 1 | -2/+1 |
| * | fixed to test only the feature, not the feature and a CPU | Sanjay Patel | 2015-03-06 | 1 | -4/+4 |
| * | fixed test to use FileCheck | Sanjay Patel | 2015-03-06 | 1 | -3/+8 |
| * | fixed to use CHECK-LABELs | Sanjay Patel | 2015-03-06 | 1 | -9/+9 |
| * | fixed to test only the feature, not the feature and a CPU | Sanjay Patel | 2015-03-06 | 1 | -1/+1 |
| * | fixed to test only the feature, not the feature and a CPU | Sanjay Patel | 2015-03-06 | 1 | -2/+2 |
| * | fixed to test feature, not CPU | Sanjay Patel | 2015-03-06 | 1 | -1/+1 |
| * | fixed to test features, not CPUs | Sanjay Patel | 2015-03-06 | 1 | -3/+3 |
| * | fixed test to use SSE2 attribute | Sanjay Patel | 2015-03-06 | 1 | -1/+1 |
| * | fixed to test only the feature, not the feature and a CPU | Sanjay Patel | 2015-03-06 | 1 | -1/+1 |
| * | DAGCombiner: Canonicalize select(and/or,x,y) depending on target. | Matthias Braun | 2015-03-06 | 5 | -14/+115 |
| * | LegalizeTypes: Handle shift by 0 in ExpandShiftByConstant. | Michael Zolotukhin | 2015-03-06 | 1 | -0/+12 |
| * | [AVX] Lower / fast-isel scalar FP selects into VBLENDV instructions (PR22483) | Sanjay Patel | 2015-03-05 | 1 | -72/+24 |
| * | [AArch64] Teach AsmPrinter about GlobalAddress operands. | Ahmed Bougacha | 2015-03-05 | 1 | -0/+20 |
| * | Use the correct func begin symbol in all places in ppc. | Rafael Espindola | 2015-03-05 | 2 | -3/+4 |
| * | [ARM] Enable vector extload combine for legal types. | Ahmed Bougacha | 2015-03-05 | 3 | -12/+2 |
| * | Use the generic Lfunc_begin label on ppc. | Rafael Espindola | 2015-03-05 | 5 | -25/+89 |
| * | X86: Optimize address mode matching for FRAME_ALLOC_RECOVER nodes | David Majnemer | 2015-03-05 | 1 | -4/+4 |
| * | Replace llvm.frameallocate with llvm.frameescape | Reid Kleckner | 2015-03-05 | 8 | -132/+142 |
| * | [DagCombiner] Allow shuffles to merge through bitcasts | Simon Pilgrim | 2015-03-05 | 6 | -20/+79 |
| * | While reviewing the changes to Clang to add builtin support for the vsld, vsr... | Kit Barton | 2015-03-05 | 1 | -5/+8 |
| * | Revert change r231366 as it broke clang-native-arm-cortex-a9 Analysis/propert... | Igor Laevsky | 2015-03-05 | 1 | -38/+0 |
