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* Move some debug testcases to the debug info directory.Eric Christopher2013-08-2716-966/+0
| | | | llvm-svn: 189418
* AVX-512: added conversion instructions.Elena Demikhovsky2013-08-271-0/+186
| | | | llvm-svn: 189349
* DAGCombiner: make sure or/shl/srl really has zero high bits before forming bswapTim Northover2013-08-271-6/+101
| | | | | | | | We want to convert code like (or (srl N, 8), (shl N, 8)) into (srl (bswap N), const), but this is only valid if the bits above 16 on the source pattern are 0, the checks we were doing on this were slightly wrong before. llvm-svn: 189348
* AVX-512: Added FMA instructions.Elena Demikhovsky2013-08-271-0/+83
| | | | llvm-svn: 189326
* Debug Info: add an identifier field to DICompositeType.Manman Ren2013-08-2635-67/+67
| | | | | | | | | | | | | | | | | | DICompositeType will have an identifier field at position 14. For now, the field is set to null in DIBuilder. For DICompositeTypes where the template argument field (the 13th field) was optional, modify DIBuilder to make sure the template argument field is set. Now DICompositeType has 15 fields. Update DIBuilder to use NULL instead of "i32 0" for null value of a MDNode. Update verifier to check that DICompositeType has 15 fields and the last field is null or a MDString. Update testing cases to include an extra field for DICompositeType. The identifier field will be used by type uniquing so a front end can genearte a DICompositeType with a unique identifer. llvm-svn: 189282
* AVX-512: Added shuffle instructions - Elena Demikhovsky2013-08-261-0/+62
| | | | | | | VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN single and double forms. llvm-svn: 189215
* AVX-512: added UNPACK instructions and tests for all-zero/all-ones vectorsElena Demikhovsky2013-08-252-11/+62
| | | | llvm-svn: 189189
* Update test to use rdrnd instead of rdrand.Rafael Espindola2013-08-231-1/+1
| | | | llvm-svn: 189146
* Update tests to use sse4.2 instead of sse42.Rafael Espindola2013-08-2323-24/+24
| | | | llvm-svn: 189145
* Replace more uses of sse41 with sse4.1.Rafael Espindola2013-08-2339-46/+46
| | | | | | | llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( llvm-svn: 189144
* Update a test that I missed in the previous commit.Rafael Espindola2013-08-231-2/+2
| | | | llvm-svn: 189143
* Rename features to match what gcc and clang use.Rafael Espindola2013-08-2312-14/+14
| | | | | | | There is no advantage in being different and using the same names simplifies clang a bit. llvm-svn: 189141
* Update to remove the no-frame-pointer-elim-non-leaf flag if it was set to ↵Bill Wendling2013-08-225-6/+6
| | | | | | 'false'. llvm-svn: 189068
* Fix some tests. The 'false' version just omits the attribute altogether.Bill Wendling2013-08-221-4/+4
| | | | llvm-svn: 189065
* [Debug Info Tests] Update testing cases.Manman Ren2013-08-224-6/+6
| | | | | | | | | A single metadata will not span multiple lines. This also helps me with my script to automatic update the testing cases. A debug info testing case should have a llvm.dbg.cu. Do not use hard-coded id for debug nodes. llvm-svn: 189033
* [stackprotector] When finding the split point to splice off the end of a ↵Michael Gottesman2013-08-221-0/+99
| | | | | | | | parentmbb into a successmbb, include any DBG_VALUE MI. Fix for PR16954. llvm-svn: 188987
* TBAA: remove !tbaa from testing cases when they are not needed.Manman Ren2013-08-214-52/+31
| | | | | | | This will make it easier to turn on struct-path aware TBAA since the metadata format will change. llvm-svn: 188944
* Teach BaseIndexOffset::match to identify base pointers in loops.Juergen Ributzka2013-08-211-0/+30
| | | | | | | | | | | | | | The small utility function that pattern matches Base + Index + Offset patterns for loads and stores fails to recognize the base pointer for loads/stores from/into an array at offset 0 inside a loop. As a result DAGCombiner::MergeConsecutiveStores was not able to merge all stores. This commit fixes the issue by adding an additional pattern match and also a test case. Reviewer: Nadav llvm-svn: 188936
* Add -mcpu to two X86 tests.Joey Gouly2013-08-212-2/+2
| | | | | | These tests are failing on Haswell CPUs due to different instruction selection. llvm-svn: 188908
* AVX-512: Added SHIFT instructions.Elena Demikhovsky2013-08-211-0/+108
| | | | llvm-svn: 188899
* AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQElena Demikhovsky2013-08-201-0/+27
| | | | llvm-svn: 188786
* Improve the widening of integral binary vector operationsPaul Redmond2013-08-193-10/+4
| | | | | | | | | | | | | | - split WidenVecRes_Binary into WidenVecRes_Binary and WidenVecRes_BinaryCanTrap - WidenVecRes_BinaryCanTrap preserves the original behaviour for operations that can trap - WidenVecRes_Binary simply widens the operation and improves codegen for 3-element vectors by allowing widening and promotion on x86 (matches the behaviour of unary and ternary operation widening) - use WidenVecRes_Binary for operations on integers. Reviewed by: nrotem llvm-svn: 188699
* AVX-512: added arithmetic and logical operations.Elena Demikhovsky2013-08-192-3/+229
| | | | | | | ADD, SUB, MUL integer and FP types. OR, AND, XOR. Added embeded broadcast form for these instructions. llvm-svn: 188673
* AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.Elena Demikhovsky2013-08-181-0/+75
| | | | llvm-svn: 188637
* [tests] Another attempt to workaround broken misched-copy.s test on some ↵Daniel Dunbar2013-08-162-1/+9
| | | | | | buildbots. llvm-svn: 188567
* Don't use v16i32 for load pattern matching. All 512-bit loads are cated to ↵Craig Topper2013-08-161-0/+41
| | | | | | v8i64. llvm-svn: 188534
* [tests] Add a hack to eliminate some dangling .s files on buildbots.Daniel Dunbar2013-08-161-0/+8
| | | | | | | | - Benjamin fixed the emission of this file in r179937, but it still lives on a few buildbots. We should probably clean up the build dirs once in a while, eh? llvm-svn: 188527
* [tests] Cleanup initialization of test suffixes.Daniel Dunbar2013-08-162-4/+0
| | | | | | | | | | | | | | | | | - Instead of setting the suffixes in a bunch of places, just set one master list in the top-level config. We now only modify the suffix list in a few suites that have one particular unique suffix (.ml, .mc, .yaml, .td, .py). - Aside from removing the need for a bunch of lit.local.cfg files, this enables 4 tests that were inadvertently being skipped (one in Transforms/BranchFolding, a .s file each in DebugInfo/AArch64 and CodeGen/PowerPC, and one in CodeGen/SI which is now failing and has been XFAILED). - This commit also fixes a bunch of config files to use config.root instead of older copy-pasted code. llvm-svn: 188513
* Revert r188449 as it turns out we're just missing the instructions that need ↵Craig Topper2013-08-151-8/+0
| | | | | | the v16i32/v16f32 matching. llvm-svn: 188454
* Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that ↵Craig Topper2013-08-151-0/+8
| | | | | | type. Remove 128-bit vector handling from isPermImmMask too, it's covered by isPSHUFDMask. llvm-svn: 188449
* llvm/test/CodeGen/X86/setcc-sentinals.ll: Relax expressions for x86_64-win32.NAKAMURA Takumi2013-08-141-2/+2
| | | | llvm-svn: 188340
* DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)Jim Grosbach2013-08-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | A common idiom is to use zero and all-ones as sentinal values and to check for both in a single conditional ("x != 0 && x != (unsigned)-1"). That generates code, for i32, like: testl %edi, %edi setne %al cmpl $-1, %edi setne %cl andb %al, %cl With this transform, we generate the simpler: incl %edi cmpl $1, %edi seta %al Similar improvements for other integer sizes and on other platforms. In general, combining the two setcc instructions into one is better. rdar://14689217 llvm-svn: 188315
* AVX-512: Added CMP and BLEND instructions.Elena Demikhovsky2013-08-131-0/+113
| | | | | | Lowering for SETCC. llvm-svn: 188265
* Fix FileCheck --check-prefix lines.Tim Northover2013-08-121-1/+1
| | | | | | | | | | Various tests had sprung up over the years which had --check-prefix=ABC on the RUN line, but "CHECK-ABC:" later on. This happened to work before, but was strictly incorrect. FileCheck is getting stricter soon though. Patch by Ron Ofir. llvm-svn: 188173
* Allow compatible extension attributes for tail callsTim Northover2013-08-122-3/+59
| | | | | | | | If the tail-callee and caller give the same bits via the same signext/zeroext attribute then a tail-call should be allowed, since the extension has already been done by the callee. llvm-svn: 188159
* AVX-512: Added more tests for BROADCASTElena Demikhovsky2013-08-111-0/+16
| | | | llvm-svn: 188148
* AVX-512: Added VPERM* instructons and MOV* zmm-to-zmm instructions.Elena Demikhovsky2013-08-111-0/+66
| | | | | | Added a test for shuffles using VPERM. llvm-svn: 188147
* [stackprotector] Simplify SP Pass so that we emit different fail basic ↵Michael Gottesman2013-08-091-0/+4
| | | | | | | | | | | | | blocks for each fail condition. This patch decouples the stack protector pass so that we can support stack protector implementations that do not use the IR level generated stack protector fail basic block. No codesize increase is caused by this change since the MI level tail merge pass properly merges together the fail condition blocks (see the updated test). llvm-svn: 188105
* CHECK-LABEL-ify testsStephen Lin2013-08-092-10/+10
| | | | llvm-svn: 188087
* Add missing 'v' prefix in front of palignr on one of checks.Craig Topper2013-08-091-1/+1
| | | | llvm-svn: 188054
* Set ISD::FROUND to Expand by default for all typesHal Finkel2013-08-091-0/+22
| | | | | | | | | | | For most libm ISD nodes, TargetLoweringBase::initActions sets the default scalar-type action to Expand, and leaves the vector-type action default as Legal. This is not appropriate for the new ISD::FROUND node (which no backend but PowerPC handles explicitly). Fixes PR16842. llvm-svn: 188048
* Revert "Reapply r185872 now that the address sanitizer has been changed to ↵Arnold Schwaighofer2013-08-081-3/+4
| | | | | | | | support this." This reverts commit r187939. It broke an O0 build of a spec benchmark. llvm-svn: 188012
* test commit.Andrea Di Biagio2013-08-081-1/+1
| | | | llvm-svn: 187974
* Reapply r185872 now that the address sanitizer has been changed to support this.Bill Wendling2013-08-071-4/+3
| | | | | | | | | | | | | | | | | | | | | Original commit message: Stop emitting weak symbols into the "coal" sections. The Mach-O linker has been able to support the weak-def bit on any symbol for quite a while now. The compiler however continued to place these symbols into a "coal" section, which required the linker to map them back to the base section name. Replace the sections like this: __TEXT/__textcoal_nt instead use __TEXT/__text __TEXT/__const_coal instead use __TEXT/__const __DATA/__datacoal_nt instead use __DATA/__data <rdar://problem/14265330> llvm-svn: 187939
* AVX-512 set: Added BROADCAST instructionsElena Demikhovsky2013-08-071-0/+37
| | | | | | with lowering logic and a test. llvm-svn: 187884
* Debug Info Finder|Verifier: handle DbgLoc attached to instructions.Manman Ren2013-08-063-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Also remove checking of llvm.dbg.sp since it is not used in generating dwarf. Current state of Finder: DebugInfoFinder tries to list all debug info MDNodes used in a module. To list debug info MDNodes used by an instruction, DebugInfoFinder provides processDeclare, processValue and processLocation to handle DbgDeclareInst, DbgValueInst and DbgLoc attached to instructions. processModule will go through all DICompileUnits in llvm.dbg.cu and list debug info MDNodes used by the CUs. TODO: 1> Finder has a list of CUs, SPs, Types, Scopes and global variables. We need to add a list of variables that are used by DbgDeclareInst and DbgValueInst. 2> MDString fields should be null or isa<MDString> and MDNode fields should be null or isa<MDNode>. We currently use empty string or int 0 to represent null. 3> Go though Verify functions and make sure that they check field types. 4> Clean up existing testing cases to remove llvm.dbg.sp and make sure each testing case has a llvm.dbg.cu. Re-apply r187609 with fix to pass ocaml binding. vmcore.ml generates a debug location with scope being metadata !{}, in verifier we treat this as a null scope. llvm-svn: 187812
* Refactor isInTailCallPosition handlingTim Northover2013-08-062-0/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change came about primarily because of two issues in the existing code. Niether of: define i64 @test1(i64 %val) { %in = trunc i64 %val to i32 tail call i32 @ret32(i32 returned %in) ret i64 %val } define i64 @test2(i64 %val) { tail call i32 @ret32(i32 returned undef) ret i32 42 } should be tail calls, and the function sameNoopInput is responsible. The main problem is that it is completely symmetric in the "tail call" and "ret" value, but in reality different things are allowed on each side. For these cases: 1. Any truncation should lead to a larger value being generated by "tail call" than needed by "ret". 2. Undef should only be allowed as a source for ret, not as a result of the call. Along the way I noticed that a mismatch between what this function treats as a valid truncation and what the backends see can lead to invalid calls as well (see x86-32 test case). This patch refactors the code so that instead of being based primarily on values which it recurses into when necessary, it starts by inspecting the type and considers each fundamental slot that the backend will see in turn. For example, given a pathological function that returned {{}, {{}, i32, {}}, i32} we would consider each "real" i32 in turn, and ask if it passes through unchanged. This is much closer to what the backend sees as a result of ComputeValueVTs. Aside from the bug fixes, this eliminates the recursion that's going on and, I believe, makes the bulk of the code significantly easier to understand. The trade-off is the nasty iterators needed to find the real types inside a returned value. llvm-svn: 187787
* AVX-512 set: added mask operations, lowering BUILD_VECTOR for i1 vector types.Elena Demikhovsky2013-08-051-0/+58
| | | | | | Added intrinsics and tests. llvm-svn: 187717
* X86: Turn fp selects into mask operations.Benjamin Kramer2013-08-043-48/+290
| | | | | | | | | | | | | | | | | | | | | | | double test(double a, double b, double c, double d) { return a<b ? c : d; } before: _test: ucomisd %xmm0, %xmm1 ja LBB0_2 movaps %xmm3, %xmm2 LBB0_2: movaps %xmm2, %xmm0 after: _test: cmpltsd %xmm1, %xmm0 andpd %xmm0, %xmm2 andnpd %xmm3, %xmm0 orpd %xmm2, %xmm0 Small speedup on Benchmarks/SmallPT llvm-svn: 187706
* AVX-512 set: added VEXTRACTPS instructionElena Demikhovsky2013-08-041-1/+20
| | | | llvm-svn: 187705
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