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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
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vector-shuffle-v1.ll
Commit message (
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Author
Age
Files
Lines
*
AVX-512: Load and Extended Load for i1 vectors
Elena Demikhovsky
2016-04-03
1
-23
/
+7
*
[SelectionDAG] change getConstant() to use the input SDLoc when building spla...
Sanjay Patel
2016-02-11
1
-2
/
+2
*
AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation.
Igor Breger
2016-02-07
1
-27
/
+27
*
AVX512: Fix truncate v32i8 to v32i1 lowering implementation.
Igor Breger
2016-01-28
1
-16
/
+16
*
AVX512: Masked move intrinsic implementation.
Igor Breger
2016-01-21
1
-9
/
+9
*
[X86][AVX2] Broadcast subvectors
Simon Pilgrim
2016-01-18
1
-4
/
+4
*
AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instru...
Igor Breger
2016-01-18
1
-13
/
+6
*
[X86][AVX512] Regenerate v1 shuffle tests
Simon Pilgrim
2016-01-17
1
-2
/
+2
*
AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.
Igor Breger
2015-12-27
1
-18
/
+58
*
AVX512: Implemented DAG lowering for shuff62x2/shufi62x2 instructions ( shuff...
Igor Breger
2015-10-15
1
-4
/
+2
*
AVX-512: shufflevector for i1 vectors <2 x i1> .. <64 x i1>
Elena Demikhovsky
2015-09-17
1
-0
/
+401