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path: root/llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
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* [X86][SSE41] Avoid variable blend for constant v8i16 shiftsSimon Pilgrim2016-03-131-18/+7
* [X86][SSE] Regenerate vector shift testsSimon Pilgrim2016-02-061-1/+1
* AVX512BW: Enable packed word shift for 512bit vector. Enable lowering scalar ...Igor Breger2015-12-231-1/+175
* Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight2015-11-231-0/+1
* [X86][SSE] shift/rotate tests - remove unnecessary mcpu arguments and regener...Simon Pilgrim2015-10-251-4/+4
* [X86][XOP] Added support for the lowering of 128-bit vector shifts to XOP shi...Simon Pilgrim2015-09-301-0/+305
* [X86][SSE] Vectorize i64 ASHR operationsSimon Pilgrim2015-07-291-116/+57
* [X86][SSE] Added nounwind attribute to vector shift tests.Simon Pilgrim2015-07-161-16/+16
* [X86][SSE] Vectorized v4i32 non-uniform shifts.Simon Pilgrim2015-07-121-58/+37
* [X86][SSE] Vector shift test cleanup. NFC.Simon Pilgrim2015-07-081-13/+13
* [X86][SSE] Vectorized i64 uniform constant SRA shiftsSimon Pilgrim2015-07-061-31/+10
* [X86][AVX] Added full set of 256-bit vector shift tests.Simon Pilgrim2015-06-241-0/+767
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