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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
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vec_ctbits.ll
Commit message (
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Author
Age
Files
Lines
*
[x86] transform vector inc/dec to use -1 constant (PR33483)
Sanjay Patel
2017-06-26
1
-18
/
+20
*
[VectorLegalizer] Expansion of CTLZ using CTPOP when possible
Simon Pilgrim
2016-11-08
1
-25
/
+72
*
[X86][SSE] Don't decide when to scalarize CTTZ/CTLZ for performance at loweri...
Simon Pilgrim
2016-08-04
1
-21
/
+40
*
[SelectionDAG] change getConstant() to use the input SDLoc when building spla...
Sanjay Patel
2016-02-11
1
-5
/
+5
*
Make utils/update_llc_test_checks.py note that the assertions are
James Y Knight
2015-11-23
1
-0
/
+1
*
[X86][SSE] Refreshed vector bit count tests.
Simon Pilgrim
2015-07-26
1
-26
/
+102
*
llvm/test/CodeGen/X86/vec_ctbits.ll: Add explicit -mtriple=x86_64-unknown. It...
NAKAMURA Takumi
2014-09-12
1
-1
/
+1
*
Legalizer: Use the scalar bit width when promoting bit counting instrs on
Benjamin Kramer
2014-09-12
1
-1
/
+50
*
Manually upgrade the test suite to specify the flag to cttz and ctlz.
Chandler Carruth
2011-12-12
1
-4
/
+4
*
Eliminate more uses of llvm-as and llvm-dis.
Dan Gohman
2009-09-08
1
-1
/
+1
*
Add nounwind.
Evan Cheng
2008-05-29
1
-3
/
+3
*
Allow vector integer constants to be created with
Dan Gohman
2007-12-12
1
-0
/
+18