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path: root/llvm/test/CodeGen/X86/or-lea.ll
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* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-13/+13
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-13/+13
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-8/+8
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-13/+13
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-0/+13
* Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight2015-11-231-0/+1
* [x86] try harder to match bitwise 'or' into an LEASanjay Patel2015-11-091-12/+6
* [x86] add test case that shows holes in LEA iselSanjay Patel2015-10-211-0/+125
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