Commit message (Expand) | Author | Age | Files | Lines | |
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* | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -13/+13 |
* | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih | 2017-12-07 | 1 | -13/+13 |
* | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -8/+8 |
* | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -13/+13 |
* | VirtRegMap: Replace some identity copies with KILL instructions. | Matthias Braun | 2016-07-09 | 1 | -0/+13 |
* | Make utils/update_llc_test_checks.py note that the assertions are | James Y Knight | 2015-11-23 | 1 | -0/+1 |
* | [x86] try harder to match bitwise 'or' into an LEA | Sanjay Patel | 2015-11-09 | 1 | -12/+6 |
* | [x86] add test case that shows holes in LEA isel | Sanjay Patel | 2015-10-21 | 1 | -0/+125 |