bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.	Craig Topper	2018-04-05	1	-2/+2
*	[X86] Revert r329251-329254	Craig Topper	2018-04-05	1	-220/+65
*	[X86] Auto-generate complete checks. NFC	Craig Topper	2018-04-05	1	-65/+220
*	X86: Do not use llc -march in tests.	Matthias Braun	2017-08-02	1	-3/+3
*	Add LiveRangeShrink pass to shrink live range within BB.	Dehao Chen	2017-05-31	1	-2/+2
*	Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."	Hans Wennborg	2017-05-18	1	-2/+2
*	Add LiveRangeShrink pass to shrink live range within BB.	Dehao Chen	2017-05-12	1	-2/+2
*	[opaque pointer type] Add textual IR support for explicit type parameter to l...	David Blaikie	2015-02-27	1	-32/+32
*	[opaque pointer type] Add textual IR support for explicit type parameter to g...	David Blaikie	2015-02-27	1	-24/+24
*	mi-sched: improve the generic register pressure comparison.	Andrew Trick	2013-08-30	1	-7/+7
*	mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness...	Andrew Trick	2013-08-30	1	-2/+2
*	Reenable, improve, and add MI-Sched unit tests.	Andrew Trick	2013-06-17	1	-10/+9
*	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	2013-06-15	1	-9/+10
*	TBAA: remove !tbaa from testing cases if not used.	Manman Ren	2013-04-30	1	-40/+36
*	MIsched: Improve the interface to SchedDFS analysis (subtrees).	Andrew Trick	2013-01-25	1	-3/+0
*	MISched: Add SchedDFSResult to ScheduleDAGMI to formalize the	Andrew Trick	2013-01-25	1	-0/+3
*	misched: Analysis that partitions the DAG into subtrees.	Andrew Trick	2012-11-28	1	-0/+68
*	misched: better alias analysis.	Andrew Trick	2012-11-28	1	-0/+127