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path: root/llvm/test/CodeGen/X86/masked_gather_scatter.ll
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* [X86] Change vXi1 extract_vector_elt lowering to be legal if the index is 0. ...Craig Topper2019-01-111-4/+4
* [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.Craig Topper2018-11-091-32/+32
* [ScalarizeMaskedMemIntrin] When expanding masked gathers, start with the pass...Craig Topper2018-09-271-64/+56
* [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' to check mask values...Craig Topper2018-09-271-22/+15
* [SelectionDAG] When splitting scatter nodes during DAGCombine, create a seria...Craig Topper2018-08-071-16/+16
* [X86] When removing sign extends from gather/scatter indices, make sure we ha...Craig Topper2018-07-271-0/+51
* Correct dwarf unwind information in function epiloguePetar Jovanovic2018-04-241-0/+16
* [X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of ...Craig Topper2018-04-071-6/+6
* [X86] Use vpmovq2m/vpmovd2m for truncate to vXi1 when possible.Craig Topper2018-02-191-48/+48
* [SelectionDAG] SimplifyDemandedVectorElts - add support for VECTOR_INSERT_ELTSimon Pilgrim2018-02-171-4/+0
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-55/+55
* [X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero...Craig Topper2018-01-271-26/+18
* [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than ...Craig Topper2018-01-111-89/+82
* [X86] Optimize v2i32/v2f32 scatters.Craig Topper2018-01-111-25/+14
* [SelectionDAG][X86] Explicitly store the scale in the gather/scatter ISD nodesCraig Topper2018-01-101-0/+160
* [X86] Make v2i1 and v4i1 legal types without VLXCraig Topper2018-01-071-203/+196
* [X86] Add a DAG combines to turn vXi64 muls into VPMULDQ/VPMULUDQ if the uppe...Craig Topper2017-12-251-4/+4
* [SelectionDAG] Teach SelectionDAG::getNode to constant fold zext/aext/sext of...Craig Topper2017-12-231-2/+4
* [X86] Remove zext from vXi32 to vXi64 on indices of gather/scatter instructio...Craig Topper2017-12-201-0/+45
* [X86] Optimize sign extends on index operand to gather/scatter to not sign ex...Craig Topper2017-12-201-46/+24
* [X86] Don't zero the upper bits of the k-register before extracting a single ...Craig Topper2017-12-141-77/+55
* [X86] Add a test case for masked scatter where the index needs to be legalize...Craig Topper2017-12-111-0/+52
* [X86] Don't use getTargetConstant for all 0s and all 1s mask vector.Craig Topper2017-12-091-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-44/+44
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-211/+211
* [X86] Custom legalize v2i32 gathers via widening rather than promoting.Craig Topper2017-12-011-59/+60
* [X86][SelectionDAG] Make sure we explicitly sign extend the index when type p...Craig Topper2017-12-011-21/+55
* [X86] Add another v2i32 gather test case with v2i64 index that wasn't sign ex...Craig Topper2017-12-011-32/+81
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-62/+62
* [X86] Add another gather test with v8i8 sign extended indices.Craig Topper2017-11-181-0/+48
* [X86] Add DAG combine to remove sext i32->i64 from gather/scatter instructions.Craig Topper2017-11-161-255/+103
* [X86] Add gather test with index sign extended from i8 type.Craig Topper2017-11-161-0/+63
* [X86] Don't remove sign extend of gather/scatter indices during SelectionDAGB...Craig Topper2017-11-161-103/+255
* [X86] Pre-truncate gather/scatter indices that have element sizes larger than...Craig Topper2017-11-161-0/+63
* [X86] Update TTI to report that v1iX/v1fX types aren't legal for masked gathe...Craig Topper2017-11-161-0/+76
* [X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter addressCraig Topper2017-11-131-38/+75
* [SelectionDAG] Teach SelectionDAGBuilder's getUniformBase for gather/scatter ...Craig Topper2017-11-101-20/+8
* [X86] Add test case to demonstrate failure to fold the address computation of...Craig Topper2017-11-101-2/+226
* Revert "Correct dwarf unwind information in function epilogue for X86"Reid Kleckner2017-11-081-10/+0
* Reland "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic2017-11-071-0/+10
* [X86][AVX512] Improve lowering of AVX512 test intrinsicsUriel Korach2017-11-061-18/+6
* Revert "Correct dwarf unwind information in function epilogue for X86"Petar Jovanovic2017-11-011-10/+0
* Correct dwarf unwind information in function epilogue for X86Petar Jovanovic2017-11-011-0/+10
* [MC] Suppress .Lcfi labels when emitting textual assemblyReid Kleckner2017-10-101-30/+0
* [X86] Teach execution domain fixing to convert between VPERMILPS and VPSHUFD.Craig Topper2017-09-181-5/+5
* [X86] Add more patterns to use moves to zero the upper portions of a vector r...Craig Topper2017-09-031-22/+11
* [X86] Add patterns to turn an insert into lower subvector of a zero vector in...Craig Topper2017-09-031-39/+19
* [X86] Add VBLENDPS/VPBLENDD to the execution domain fixing tables.Craig Topper2017-09-031-12/+12
* [X86] Add a target-specific DAG combine to combine extract_subvector from all...Craig Topper2017-08-271-10/+4
* [AVX512] Don't switch unmasked subvector insert/extract instructions when AVX...Craig Topper2017-08-171-13/+13
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