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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
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lower-vec-shift.ll
Commit message (
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Author
Age
Files
Lines
*
[SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodes
Simon Pilgrim
2018-10-30
1
-2
/
+0
*
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
Simon Pilgrim
2018-07-10
1
-8
/
+17
*
[X86][SSE] Add extra v16i16 shl x,c -> pmullw test
Simon Pilgrim
2018-07-05
1
-0
/
+27
*
[X86][SSE] Add v16i16 shl x,c -> pmullw test
Simon Pilgrim
2018-07-04
1
-3
/
+26
*
[X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values (REAPPLIED)
Simon Pilgrim
2018-07-04
1
-22
/
+12
*
[X86][SSE] Add reduced crash test case for r336113 - [X86][SSE] Blend any v8i...
Simon Pilgrim
2018-07-04
1
-0
/
+25
*
Revert "[X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values"
Benjamin Kramer
2018-07-03
1
-12
/
+22
*
[X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values
Simon Pilgrim
2018-07-02
1
-22
/
+12
*
[X86][SSE] Add v8i16 shift test for 2 shift values that doesn't match basic b...
Simon Pilgrim
2018-07-02
1
-0
/
+32
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-24
/
+24
*
[X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input inste...
Craig Topper
2017-10-04
1
-32
/
+24
*
[X86][SSE] Dropped -mcpu from vector shift tests
Simon Pilgrim
2017-06-29
1
-4
/
+3
*
[X86][SSE] Don't blend vector shifts with MOVSS/MOVSD directly, lower from ge...
Simon Pilgrim
2016-09-14
1
-32
/
+60
*
[X86][SSE] Regenerate vector shift lowering tests
Simon Pilgrim
2016-08-10
1
-78
/
+143
*
[X86] Improve the lowering of packed shifts by constant build_vector.
Andrea Di Biagio
2014-04-15
1
-0
/
+125