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path: root/llvm/test/CodeGen/X86/lower-vec-shift.ll
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* [SelectionDAG] Add FoldBUILD_VECTOR to simplify new BUILD_VECTOR nodesSimon Pilgrim2018-10-301-2/+0
* [X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)Simon Pilgrim2018-07-101-8/+17
* [X86][SSE] Add extra v16i16 shl x,c -> pmullw testSimon Pilgrim2018-07-051-0/+27
* [X86][SSE] Add v16i16 shl x,c -> pmullw testSimon Pilgrim2018-07-041-3/+26
* [X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values (REAPPLIED)Simon Pilgrim2018-07-041-22/+12
* [X86][SSE] Add reduced crash test case for r336113 - [X86][SSE] Blend any v8i...Simon Pilgrim2018-07-041-0/+25
* Revert "[X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique values"Benjamin Kramer2018-07-031-12/+22
* [X86][SSE] Blend any v8i16/v4i32 shift with 2 shift unique valuesSimon Pilgrim2018-07-021-22/+12
* [X86][SSE] Add v8i16 shift test for 2 shift values that doesn't match basic b...Simon Pilgrim2018-07-021-0/+32
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-24/+24
* [X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input inste...Craig Topper2017-10-041-32/+24
* [X86][SSE] Dropped -mcpu from vector shift testsSimon Pilgrim2017-06-291-4/+3
* [X86][SSE] Don't blend vector shifts with MOVSS/MOVSD directly, lower from ge...Simon Pilgrim2016-09-141-32/+60
* [X86][SSE] Regenerate vector shift lowering testsSimon Pilgrim2016-08-101-78/+143
* [X86] Improve the lowering of packed shifts by constant build_vector.Andrea Di Biagio2014-04-151-0/+125
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