summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/known-bits.ll
Commit message (Expand)AuthorAgeFilesLines
* [SelectionDAG] Add FSHL/FSHR support to computeKnownBitsSimon Pilgrim2018-12-161-14/+4
* [X86] Add computeKnownBits tests for funnel shift intrinsicsSimon Pilgrim2018-12-161-0/+43
* Bias physical register immediate assignmentsNirav Dave2018-11-141-8/+8
* [X86] Move promotion of vector and/or/xor from legalization to DAG combineCraig Topper2018-10-151-2/+2
* [X86] Make requested test changes from D50636Simon Pilgrim2018-08-251-27/+54
* [x86] shrink 'and' immediate values by setting the high bits (PR35907)Sanjay Patel2018-01-191-2/+0
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-10/+10
* [x86] swap order of srl (and X, C1), C2 when it saves sizeSanjay Patel2017-09-221-2/+2
* Do not legalize large add with addc/adde, introduce addcarry and do it with u...Amaury Sechet2017-04-301-11/+11
* [SelectionDAG] Make SelectionDAG aware of the known bits in USUBO and SSUBO a...Amaury Sechet2017-03-101-4/+4
* [SelectionDAG] Make SelectionDAG aware of the known bits in UADDO and SADDO.Amaury Sechet2017-03-101-3/+3
* Add test case for computing known bits of substraction operations. NFCAmaury Sechet2017-02-281-0/+53
* Add test for known bits in uaddo and saddo.Amaury Sechet2017-02-251-0/+54
* [DAGCombiner] Push truncate through adde when the carry isn't used.Amaury Sechet2017-02-081-2/+1
* Add ADDC to SelectionDAG::computeKnownBits and ComputeNumSignBits.Amaury Sechet2017-02-061-4/+2
* [X86] Add add/addc known-bits tests (D29521)Simon Pilgrim2017-02-061-0/+66
* [X86][SSE] Add support for combining AND bitmasks to shuffles.Simon Pilgrim2016-12-011-4/+2
* [X86][SSE] Regenerated known-bits test with srem->urem fixSimon Pilgrim2016-10-251-18/+18
* [SelectionDAG] Ensure DAG::getZeroExtendInReg is called with a scalar typeSimon Pilgrim2016-09-091-0/+107
OpenPOWER on IntegriCloud