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* DAG: Avoid OOB when legalizing vector indexingMatt Arsenault2017-01-101-1/+2
| | | | | | | | | If a vector index is out of bounds, the result is supposed to be undefined but is not undefined behavior. Change the legalization for indexing the vector on the stack so that an out of bounds index does not create an out of bounds memory access. llvm-svn: 291604
* [X86][SSE] Fix domains for VZEXT_LOAD type instructionsSimon Pilgrim2016-12-151-0/+1
| | | | | | | | Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions. Differential Revision: https://reviews.llvm.org/D27684 llvm-svn: 289825
* [X86] DAGCombine should not assume arbitrary vector types are simpleMichael Kuperstein2015-05-121-0/+11
| | | | | | | | | The X86-specific DAGCombine for stores should not assume vector types are always simple. This fixes PR23476. Differential Revision: http://reviews.llvm.org/D9659 llvm-svn: 237097
* [x86] allow 64-bit extracted vector element integer stores on a 32-bit systemSanjay Patel2015-04-221-1/+40
| | | | | | | | | | | | | | | | | | | | | With SSE2, we can generate a 'movq' or other 64-bit store op on a 32-bit system even though 64-bit integers are not legal types. So instead of producing this: pshufd $229, %xmm0, %xmm1 ## xmm1 = xmm0[1,1,2,3] movd %xmm0, (%eax) movd %xmm1, 4(%eax) We can do: movq %xmm0, (%eax) This is a fix for the problem noted in D7296. Differential Revision: http://reviews.llvm.org/D9134 llvm-svn: 235460
* use update_llc_test_checks.py to tighten checkingSanjay Patel2015-04-201-13/+22
| | | | | | | Also, replace win and linux runs with a generic run because that makes no difference in what this test is checking. llvm-svn: 235361
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* Make test independent of schedulingNico Rieck2014-01-121-1/+1
| | | | llvm-svn: 199055
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-121-1/+1
| | | | | | | Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code generation. llvm-svn: 199050
* test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and ↵NAKAMURA Takumi2011-03-161-2/+6
| | | | | | x86_64-win32. llvm-svn: 127734
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-2/+2
| | | | llvm-svn: 81290
* Typo.Evan Cheng2009-03-121-1/+1
| | | | llvm-svn: 66797
* On x86, if the only use of a i64 load is a i64 store, generate a pair of ↵Evan Cheng2009-03-121-0/+13
double load and store instead. llvm-svn: 66776
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