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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-12 07:33:07 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-12 07:33:07 +0000 |
| commit | 6f5ff6905cd9d36459f1394e99fcc2baf7ff3919 (patch) | |
| tree | 6d629e6bdcf8f6e93e3e23d9115c6bdcb0163bd1 /llvm/test/CodeGen/X86/i64-mem-copy.ll | |
| parent | 56aa294652938e892a155afb0f461aaeb46f6acf (diff) | |
| download | bcm5719-llvm-6f5ff6905cd9d36459f1394e99fcc2baf7ff3919.tar.gz bcm5719-llvm-6f5ff6905cd9d36459f1394e99fcc2baf7ff3919.zip | |
[X86] DAGCombine should not assume arbitrary vector types are simple
The X86-specific DAGCombine for stores should not assume vector types are always simple.
This fixes PR23476.
Differential Revision: http://reviews.llvm.org/D9659
llvm-svn: 237097
Diffstat (limited to 'llvm/test/CodeGen/X86/i64-mem-copy.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/i64-mem-copy.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/i64-mem-copy.ll b/llvm/test/CodeGen/X86/i64-mem-copy.ll index 95715ea08eb..69ec3fd806b 100644 --- a/llvm/test/CodeGen/X86/i64-mem-copy.ll +++ b/llvm/test/CodeGen/X86/i64-mem-copy.ll @@ -63,3 +63,14 @@ define void @store_i64_from_vector256(<16 x i16> %x, <16 x i16> %y, i64* %i) { ret void } +; PR23476 +; Handle extraction from a non-simple / pre-legalization type. + +define void @PR23476(<5 x i64> %in, i64* %out, i32 %index) { +; X32-LABEL: PR23476: +; X32: movsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: movsd %xmm0, (%eax) + %ext = extractelement <5 x i64> %in, i32 %index + store i64 %ext, i64* %out, align 8 + ret void +} |
