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path: root/llvm/test/CodeGen/X86/gather-addresses.ll
Commit message (Expand)AuthorAgeFilesLines
* [X86] Move promotion of vector and/or/xor from legalization to DAG combineCraig Topper2018-10-151-16/+16
* [X86] Remove some composite MOVSS/MOVSD isel patterns.Craig Topper2018-07-111-15/+15
* [X86] Add combine to shrink 64-bit ands when one input is an any_extend and t...Craig Topper2018-02-131-32/+32
* [X86][SSE] Don't colaesce v4i32 extractsSimon Pilgrim2018-01-261-91/+94
* [X86][SSE] Add SSE2 gather testsSimon Pilgrim2018-01-191-74/+156
* [X86] Regenerate test using update_llc_test_checks.py.Craig Topper2017-12-261-34/+128
* This patch completely replaces the scheduling information for the SandyBridge...Gadi Haber2017-07-101-8/+8
* Reverting commit 306414 on behalf of @gadi.haberMichael Zuckerman2017-06-281-8/+9
* Updated and extended the information about each instruction in HSW and SNB to...Gadi Haber2017-06-271-9/+8
* [X86][SSE2] Fix asm string for movq (Move Quadword) instruction.Ayman Musa2017-04-261-2/+2
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-271-8/+8
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-271-4/+4
* [X86] Improve a dag-combine that handles a vector extract -> zext sequence.Michael Kuperstein2014-12-041-24/+59
* Enable MI Sched for x86.Andrew Trick2013-10-151-12/+26
* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-26/+12
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-12/+26
* Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge...Craig Topper2012-04-271-2/+2
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-11/+12
* Enable -sse-domain-fix by default. Now with tests!Jakob Stoklund Olesen2010-03-301-1/+1
* Add an rdar number to this test.Dan Gohman2010-03-161-0/+1
* Recognize code for doing vector gather/scatter index calculations withDan Gohman2010-03-151-0/+39
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