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path: root/llvm/test/CodeGen/X86/fshl.ll
Commit message (Expand)AuthorAgeFilesLines
* [PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.Hiroshi Yamauchi2019-12-131-22/+59
* [X86] Promote i8 CMOV's (PR40965)Roman Lebedev2019-03-151-7/+5
* [X86] Enable 8-bit OR with disjoint bits to convert to LEACraig Topper2019-03-051-3/+4
* [X86] Lower to SHLD/SHRD on slow machines for optsizeSimon Pilgrim2018-12-151-39/+14
* [X86] Add optsize SHLD/SHRD testsSimon Pilgrim2018-12-151-22/+67
* [DAGCombiner] re-enable truncation of binopsSanjay Patel2018-12-081-37/+37
* [DAGCombiner] disable truncation of binops by defaultSanjay Patel2018-12-071-37/+37
* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-114/+170
* [DAGCombiner] narrow truncated binopsSanjay Patel2018-11-291-2/+2
* [X86] Add codegen tests for slow-shld scalar funnel shiftsSimon Pilgrim2018-11-191-99/+261
* [X86] Add codegen tests for scalar funnel shiftsSimon Pilgrim2018-11-161-0/+268
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