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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
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fp-logic-replace.ll
Commit message (
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Author
Age
Files
Lines
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-12
/
+12
*
[x86] regenerate checks with update_llc_test_checks.py
Sanjay Patel
2017-06-12
1
-1
/
+1
*
This is a large patch for X86 AVX-512 of an optimization for reducing code si...
Gadi Haber
2016-12-28
1
-8
/
+4
*
[AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops f...
Craig Topper
2016-12-18
1
-1
/
+1
*
[AVX-512] Use EVEX encoded logic operations for scalar types when they are av...
Craig Topper
2016-12-17
1
-4
/
+4
*
[AVX-512] Update scalar logic test to show missed opportunity to use EVEX enc...
Craig Topper
2016-12-17
1
-19
/
+40
*
[x86] fold fand (fxor X, -1) Y --> fandn X, Y
Sanjay Patel
2016-12-05
1
-6
/
+3
*
[x86] allow FP-logic ops when one operand is FP and result is FP
Sanjay Patel
2016-11-16
1
-10
/
+6
*
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some...
Sanjay Patel
2016-11-16
1
-9
/
+9
*
[x86] add tests for FP-logic equivalent instruction replacement
Sanjay Patel
2016-11-15
1
-0
/
+91