| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [opaque pointer type] Add textual IR support for explicit type parameter to l... | David Blaikie | 2015-02-27 | 1 | -4/+4 |
| * | Enable MI Sched for x86. | Andrew Trick | 2013-10-15 | 1 | -2/+2 |
| * | Revert "Temporarily enable MI-Sched on X86." | Andrew Trick | 2013-06-25 | 1 | -2/+2 |
| * | Temporarily enable MI-Sched on X86. | Andrew Trick | 2013-06-24 | 1 | -2/+2 |
| * | Turn on post-alloc scheduling for x86. | Evan Cheng | 2009-10-18 | 1 | -1/+1 |
| * | Fix this test to account for a movl $0 being emitted as an xor now, | Dan Gohman | 2009-10-14 | 1 | -2/+3 |
| * | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-08 | 1 | -2/+2 |
| * | Fix test. | Evan Cheng | 2008-09-05 | 1 | -2/+2 |
| * | If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM regist... | Evan Cheng | 2008-09-05 | 1 | -1/+1 |
| * | For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing ... | Evan Cheng | 2008-09-04 | 1 | -0/+19 |

