bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
*	[AVX-512] Teach fastisel load/store handling to use EVEX encoded ↵	Craig Topper	2016-09-05	1	-80/+280
\| \| \| \| \| \| \| \|	instructions for 128/256-bit vectors and scalar single/double. Still need to fix the register classes to allow the extended range of registers. llvm-svn: 280682
*	[X86] Update fast-isel vector load test to have more 256 and 512-bit test ↵	Craig Topper	2016-09-05	1	-82/+651
\| \| \| \| \| \|	cases. Add a command line for SKX features too. llvm-svn: 280680
*	[AVX512] Fix load opcode for fast isel.	Igor Breger	2016-06-07	1	-0/+21
\| \| \| \| \| \|	Differential Revision: http://reviews.llvm.org/D21067 llvm-svn: 272006
*	[X86][FastIsel] Teach how to select vector load instructions.	Andrea Di Biagio	2015-03-26	1	-0/+185
	This patch teaches fast-isel how to select 128-bit vector load instructions. Added test CodeGen/X86/fast-isel-vecload.ll Differential Revision: http://reviews.llvm.org/D8605 llvm-svn: 233270