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| author | Igor Breger <igor.breger@intel.com> | 2016-06-07 13:08:45 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2016-06-07 13:08:45 +0000 |
| commit | 61e628591f21c6d6e8ae11f1debf9c67fdadc48a (patch) | |
| tree | 74e54872ccd60fdb71d144bace7916648ab66a0d /llvm/test/CodeGen/X86/fast-isel-vecload.ll | |
| parent | 6b0634b3040a2dc37f4d41fceec1c415d9981deb (diff) | |
| download | bcm5719-llvm-61e628591f21c6d6e8ae11f1debf9c67fdadc48a.tar.gz bcm5719-llvm-61e628591f21c6d6e8ae11f1debf9c67fdadc48a.zip | |
[AVX512] Fix load opcode for fast isel.
Differential Revision: http://reviews.llvm.org/D21067
llvm-svn: 272006
Diffstat (limited to 'llvm/test/CodeGen/X86/fast-isel-vecload.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-vecload.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-vecload.ll b/llvm/test/CodeGen/X86/fast-isel-vecload.ll index 48eebf526f1..c5323f1c14f 100644 --- a/llvm/test/CodeGen/X86/fast-isel-vecload.ll +++ b/llvm/test/CodeGen/X86/fast-isel-vecload.ll @@ -1,5 +1,6 @@ ; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE --check-prefix=ALL ; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX --check-prefix=ALL +; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefix=KNL ; Verify that fast-isel knows how to select aligned/unaligned vector loads. ; Also verify that the selected load instruction is in the correct domain. @@ -183,3 +184,23 @@ entry: %0 = load <2 x double>, <2 x double>* %V ret <2 x double> %0 } + +define <8 x i64> @test_v8i64_alignment(<8 x i64>* %V) { +; KNL-LABEL: test_v8i64_alignment: +; KNL: # BB#0: # %entry +; KNL-NEXT: vmovdqa64 (%rdi), %zmm0 +; KNL-NEXT: retq +entry: + %0 = load <8 x i64>, <8 x i64>* %V, align 64 + ret <8 x i64> %0 +} + +define <8 x i64> @test_v8i64(<8 x i64>* %V) { +; KNL-LABEL: test_v8i64: +; KNL: # BB#0: # %entry +; KNL-NEXT: vmovdqu64 (%rdi), %zmm0 +; KNL-NEXT: retq +entry: + %0 = load <8 x i64>, <8 x i64>* %V, align 4 + ret <8 x i64> %0 +} |
