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bcm5719-llvm
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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
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fast-isel-nontemporal.ll
Commit message (
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Author
Age
Files
Lines
*
[X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1.
Craig Topper
2019-05-11
1
-16
/
+56
*
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Puyan Lotfi
2018-01-31
1
-18
/
+18
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-169
/
+169
*
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
1
-18
/
+18
*
[X86] Add avx512vl command line to fast-isel-nontemporal.ll
Craig Topper
2017-10-27
1
-0
/
+27
*
[X86][AVX1] Split 256-bit vector non-temporal FastISel loads to keep it non-t...
Simon Pilgrim
2017-06-06
1
-6
/
+30
*
[X86][AVX1] Split 256-bit vector non-temporal loads to keep it non-temporal (...
Simon Pilgrim
2017-06-05
1
-12
/
+60
*
[X86][MMX] Add fast-isel support for MMX non-temporal writes
Simon Pilgrim
2017-04-10
1
-1
/
+1
*
[X86][MMX] Test showing failure to create MMX non-temporal store
Simon Pilgrim
2017-04-06
1
-7
/
+26
*
[X86] Generate VZEROUPPER for Skylake-avx512.
Amjad Aboud
2017-03-03
1
-0
/
+14
*
[X86][AVX512] Added 512-bit integer vector non-temporal load tests
Simon Pilgrim
2016-06-07
1
-1
/
+195
*
[X86][SSE] Add general lowering of nontemporal vector loads
Simon Pilgrim
2016-06-07
1
-110
/
+276
*
[X86][SSE] Added SSE41/AVX2 non-temporal tests
Simon Pilgrim
2016-06-02
1
-1
/
+13
*
[X86][SSE] Added non-temporal load tests for vector types
Simon Pilgrim
2016-06-02
1
-0
/
+308
*
[X86] Add AVX 256-bit load and stores to fast isel.
Craig Topper
2016-06-02
1
-9
/
+9
*
[X86][SSE] Added non-temporal store tests for all 512-bit vector types
Simon Pilgrim
2016-06-01
1
-57
/
+224
*
[X86][SSE] Added non-temporal store tests for all 256-bit vector types
Simon Pilgrim
2016-06-01
1
-0
/
+185
*
[X86][SSE] Added non-temporal store tests for all 128-bit integer vector types
Simon Pilgrim
2016-06-01
1
-0
/
+45
*
[X86][FastISel] Make sure we use the right register class when we select stores.
Quentin Colombet
2016-04-27
1
-3
/
+3
*
Make utils/update_llc_test_checks.py note that the assertions are
James Y Knight
2015-11-23
1
-0
/
+1
*
[X86][FastISel] Teach how to select SSE4A nontemporal stores.
Simon Pilgrim
2015-10-17
1
-12
/
+53
*
[x86][FastISel] Teach how to select nontemporal stores.
Andrea Di Biagio
2015-10-14
1
-0
/
+69
