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path: root/llvm/test/CodeGen/X86/combine-or.ll
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* [DAG] add splat vector support for 'or' in SimplifyDemandedBitsSanjay Patel2017-04-191-9/+7
* [x86] use a single shufps when it can save instructionsSanjay Patel2016-12-151-5/+3
* [DAG] x | x --> xSanjay Patel2016-10-301-2/+0
* [x86] add tests for basic logic op foldsSanjay Patel2016-10-301-0/+18
* Fix typo in test - it should be masking bits0-15 not bit16Simon Pilgrim2016-09-071-1/+1
* [X86][SSE] Added or combine tests for known bits of vectorsSimon Pilgrim2016-09-071-0/+51
* [CodeGen] Teach OR combine of shuffles involving zero vectors to better handl...Craig Topper2016-07-031-6/+2
* [X86] Add tests to show that the DAG combine for OR of shuffles with zero vec...Craig Topper2016-07-031-0/+28
* [DAGCombine] Teach DAG combine to handle ORs of shuffles involving zero vecto...Craig Topper2016-06-291-12/+3
* [DAGCombine] Add test cases to show that DAG combining an OR of two shuffles ...Craig Topper2016-06-291-0/+44
* Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight2015-11-231-0/+1
* [DAGCombiner] Remove extra bitcasts surrounding vector shuffles Simon Pilgrim2015-04-231-0/+64
* [X86][SSE] Add SSE MOVQ instructions to SSEPackedInt domainSimon Pilgrim2015-02-161-1/+1
* [x86] Teach the 128-bit vector shuffle lowering routines to takeChandler Carruth2015-02-161-9/+11
* [SDAG] Teach the SelectionDAG to canonicalize vector shuffles of splatsChandler Carruth2015-02-151-1/+1
* [x86] Update some tests with the latest version of my script and llc.Chandler Carruth2015-02-151-1/+1
* [X86][SSE] psrl(w/d/q) and psll(w/d/q) bit shifts for SSE2Simon Pilgrim2015-02-031-10/+8
* [X86][SSE] Added general integer shuffle matching for MOVQ instructionSimon Pilgrim2015-02-031-11/+10
* [X86][SSE] Improved (v)insertps shuffle matchingSimon Pilgrim2015-01-101-6/+4
* [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targetsSimon Pilgrim2014-12-021-3/+3
* [X86][SSE] Improvements to byte shift shuffle matchingSimon Pilgrim2014-11-251-3/+2
* [X86][SSE] Enable commutation for SSE immediate blend instructionsSimon Pilgrim2014-11-041-20/+11
* [x86] Enable the new vector shuffle lowering by default.Chandler Carruth2014-10-041-31/+37
* [x86] Adjust the patterns for lowering X86vzmovl nodes which don'tChandler Carruth2014-10-031-2/+2
* [x86] Regenerate a number of FileCheck assertions with my script forChandler Carruth2014-10-031-93/+112
* [DAGCombiner] Avoid calling method 'isShuffleMaskLegal' on illegal vector types.Andrea Di Biagio2014-07-151-0/+12
* [X86] Always prefer to lower a VECTOR_SHUFFLE into a BLENDI instead of SHUFP ...Andrea Di Biagio2014-06-251-2/+2
* Separate the check for blend shuffle_vector masksFilipe Cabecinhas2014-05-301-2/+2
* [DAGCombiner] teach how to simplify xor/and/or nodes according to the followi...Andrea Di Biagio2014-03-181-0/+2
* [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes.Andrea Di Biagio2014-03-061-0/+267
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