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path: root/llvm/test/CodeGen/X86/combine-abs.ll
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* [X86] Improve vXi64 ISD::ABS codegen with SSE41+Simon Pilgrim2019-01-121-3/+2
* [X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim2019-01-121-3/+0
* [X86] Add custom execution domain fixing for 128/256-bit integer logic operat...Craig Topper2018-07-151-14/+4
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-2/+2
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-12/+12
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* [X86] Replace custom scalar integer absolute matching with ISD::ABS lowering.Simon Pilgrim2017-10-191-5/+2
* [X86] Add scalar (abs (abs x)) -> (abs x) combine test.Simon Pilgrim2017-10-191-0/+19
* [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (llvm)Uriel Korach2017-09-131-5/+14
* [X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov2017-07-271-1/+1
* [X86][SSE42] Lower v2i64/v4i64 ASHR(X, 63) as PCMPGTQ(0, X)Simon Pilgrim2017-05-091-6/+5
* [X86][AVX512] Move v2i64/v4i64 VPABS lowering to tablegenSimon Pilgrim2017-05-061-12/+26
* [DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of canonic...Simon Pilgrim2017-05-061-4/+4
* [X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL inst...Simon Pilgrim2017-03-261-1/+0
* [SelectionDAG] Add a signed integer absolute ISD nodeSimon Pilgrim2017-03-141-6/+2
* [X86][SSE] Generalized integer absolute tests to test canonical pattern as we...Simon Pilgrim2017-02-071-6/+31
* [X86][SSE] Add tests showing missed opportunities to simplify integer absolut...Simon Pilgrim2017-02-061-0/+79
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