| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [X86] Pass v32i16/v64i8 in zmm registers on KNL target. | Craig Topper | 2019-08-30 | 1 | -432/+216 |
| * | [X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm inste... | Craig Topper | 2019-07-02 | 1 | -4/+4 |
| * | [X86] Remove some composite MOVSS/MOVSD isel patterns. | Craig Topper | 2018-07-11 | 1 | -4/+4 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -16/+16 |
| * | [X86] Teach the execution domain fixing tables to use movlhps inplace of unpc... | Craig Topper | 2017-09-18 | 1 | -4/+4 |
| * | Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset | Nirav Dave | 2017-07-05 | 1 | -19/+1 |
| * | Revert "[DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset" | Nirav Dave | 2017-06-30 | 1 | -1/+19 |
| * | [DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset | Nirav Dave | 2017-06-30 | 1 | -19/+1 |
| * | [X86][SSE] Add 128/256/512 bit vector build vector from register tests | Simon Pilgrim | 2017-05-05 | 1 | -0/+712 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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