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path: root/llvm/test/CodeGen/X86/build-vector-128.ll
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* [x86] add load fold patterns for movddup with vzext_loadSanjay Patel2018-12-221-4/+2
* [x86] add movddup specialization for build vector lowering (PR37502) Sanjay Patel2018-12-211-22/+10
* [x86] move test for movddup; NFCSanjay Patel2018-12-211-48/+0
* [x86] add test to show missed movddup load fold; NFCSanjay Patel2018-12-201-0/+48
* [x86] add test to show ddup hole; NFC (PR37502)Sanjay Patel2018-12-191-0/+65
* [X86][SSE] Don't vectorize splat buildvector of binops (PR30780)Simon Pilgrim2017-12-311-14/+9
* [X86][SSE] Add PR30780 test casesSimon Pilgrim2017-12-301-0/+103
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-30/+30
* [X86] Teach the execution domain fixing tables to use movlhps inplace of unpc...Craig Topper2017-09-181-3/+3
* Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffsetNirav Dave2017-07-051-18/+5
* Revert "[DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset"Nirav Dave2017-06-301-5/+18
* [DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffsetNirav Dave2017-06-301-18/+5
* [X86][SSE] Change BUILD_VECTOR interleaving ordering to improve coalescing/co...Simon Pilgrim2017-06-041-48/+44
* [X86][SSE] Add 128/256/512 bit vector build vector from register testsSimon Pilgrim2017-05-051-0/+428
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