summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/bswap.ll
Commit message (Collapse)AuthorAgeFilesLines
* [DAGCombiner] don't hoist logic op if operands have other usesSanjay Patel2018-12-061-13/+8
| | | | | | | | | | | | | | | | | The AVX512 diffs are neutral, but the bswap test shows a clear overreach in hoistLogicOpWithSameOpcodeHands(). If we don't check for other uses, we can increase the instruction count. This could also fight with transforms trying to go in the opposite direction and possibly blow up/infinite loop. This might be enough to solve the bug noted here: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20181203/608593.html I did not add the hasOneUse() checks to all opcodes because I see a perf regression for at least one opcode. We may decide that's irrelevant in the face of potential compiler crashing, but I'll see if I can salvage that first. llvm-svn: 348508
* [x86] add test for hoistLogicOpWithSameOpcodeHands with extra uses; NFCSanjay Patel2018-12-061-10/+49
| | | | llvm-svn: 348506
* [LegalizeTypes] Prevent an assertion from PromoteIntRes_BSWAP and ↵Craig Topper2018-10-131-0/+150
| | | | | | | | | | | | | | | | | | | | | PromoteIntRes_BITREVERSE if the shift amount is too large for the VT returned by getShiftAmountTy Summary: getShiftAmountTy for X86 returns MVT::i8. If a BSWAP or BITREVERSE is created that requires promotion and the difference between the original VT and the promoted VT is more than 255 then we won't able to create the constant. This patch adds a check to replace the result from getShiftAmountTy to MVT::i32 if the difference won't fit. This should get legalized later when the shift is ultimately expanded since its clearly an illegal type that we're only promoting to make it a power of 2 bit width. Alternatively we could base the decision completely on the largest shift amount the promoted VT could use. Vectors should be immune here because getShiftAmountTy always returns the incoming VT for vectors. Only the scalar shift amount can be changed by the targets. Reviewers: eli.friedman, RKSimon, spatel Reviewed By: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D53232 llvm-svn: 344460
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-7/+8
| | | | | | | | | | | | | | Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
* [X86] Autogenerate complete checks on a couple tests. NFCCraig Topper2018-01-191-41/+94
| | | | llvm-svn: 322997
* X86: Do not use llc -march in tests.Matthias Braun2017-08-021-2/+2
| | | | | | | | | | | | | | | `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
* [opaque pointer type] Add textual IR support for explicit type parameter to ↵David Blaikie2015-02-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
* DAGCombiner: make sure or/shl/srl really has zero high bits before forming bswapTim Northover2013-08-271-6/+101
| | | | | | | | We want to convert code like (or (srl N, 8), (shl N, 8)) into (srl (bswap N), const), but this is only valid if the bits above 16 on the source pattern are 0, the checks we were doing on this were slightly wrong before. llvm-svn: 189348
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
* Force CPU type on test so it doesn't accidentally emit movbe instead of ↵Benjamin Kramer2011-10-131-1/+1
| | | | | | bswap on Intel Atom CPUs. llvm-svn: 141863
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-211-3/+35
| | | | | | | | | | | | | | 1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8) => (bswap x) >> 16 2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8)) => (rotl (bswap x) 16) This allows us to eliminate most of the def : Pat patterns for ARM rev16 revsh instructions. It catches many more cases for ARM and x86. rdar://9609108 llvm-svn: 133503
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-2/+2
| | | | llvm-svn: 81290
* Remove llvm-upgrade and update tests.Tanya Lattner2008-02-211-14/+17
| | | | llvm-svn: 47432
* Convert tests using "| wc -l | grep ..." to use the count script.Dan Gohman2007-08-151-2/+2
| | | | llvm-svn: 41097
* For PR1319:Reid Spencer2007-04-161-1/+2
| | | | | | | | Remove && from the end of the lines to prevent tests from throwing run lines into the background. Also, clean up places where the same command is run multiple times by using a temporary file. llvm-svn: 36142
* Let llvm-upgrade upgrade the bswap intrinsic.Reid Spencer2007-04-021-6/+6
| | | | llvm-svn: 35569
* For PR1297:Reid Spencer2007-04-011-6/+6
| | | | | | | | | Update these test cases to use proper signatures for bswap which is now and overloaded intrinsic. Its name must be of the form llvm.bswap.i32.i32 since both the parameter and the result or of type "iAny". Also, the bit counting intrinsics changed to always return i32. llvm-svn: 35548
* Regression is gone, don't try to find it on clean target.Reid Spencer2007-01-171-0/+23
llvm-svn: 33296
OpenPOWER on IntegriCloud