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* Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization...Craig Topper2019-08-071-8/+5
* Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."Mitch Phillips2019-08-061-5/+8
* [X86] Enable -x86-experimental-vector-widening-legalization by default.Craig Topper2019-08-051-8/+5
* [X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Suppo...Craig Topper2019-05-251-2/+2
* [SelectionDAG] computeKnownBits - support constant pool values from targetSimon Pilgrim2019-05-241-12/+6
* [X86] Enable 8-bit OR with disjoint bits to convert to LEACraig Topper2019-03-051-26/+26
* [X86][SSE] Canonicalize OR(AND(X,C),AND(Y,~C)) -> OR(AND(X,C),ANDNP(C,Y))Simon Pilgrim2019-01-221-11/+10
* [LegalizeTypes] Prevent an assertion from PromoteIntRes_BSWAP and PromoteIntR...Craig Topper2018-10-131-0/+618
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-27/+30
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-7/+7
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-7/+7
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-30/+30
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-7/+7
* [X86FixupBWInsts] More precise register liveness if no <imp-use> on MOVs.Nikolai Bozhenov2017-09-181-3/+3
* [X86] Add extra BITREVERSE testsSimon Pilgrim2017-03-141-131/+442
* [SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 integer...Simon Pilgrim2016-07-221-251/+72
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-0/+2
* [X86] Regenerated bitreverse tests to demonstrate what is going on.Simon Pilgrim2016-07-081-7/+275
* [X86] Added bitreverse tests for non-legal typesSimon Pilgrim2016-07-081-4/+40
* [x86] avoid printing unnecessary sign bits of hex immediates in asm comments ...Sanjay Patel2016-05-281-1/+1
* [SelectionDAG] Added bitreverse(bitreverse(v)) --> vSimon Pilgrim2016-05-071-320/+20
* [X86] Added BITREVERSE constant folding and identity testsSimon Pilgrim2016-05-071-1/+363
* [SDAG] Introduce a new BITREVERSE node along with a corresponding LLVM intrinsicJames Molloy2015-11-121-0/+22
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