| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [X86] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector. | Craig Topper | 2018-10-11 | 1 | -2/+4 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -1/+1 |
| * | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih | 2017-12-07 | 1 | -1/+1 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -3/+3 |
| * | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -1/+1 |
| * | [X86] Regenerate i64 to v2f32 bitcast test | Simon Pilgrim | 2017-09-23 | 1 | -3/+30 |
| * | X86: Do not use llc -march in tests. | Matthias Braun | 2017-08-02 | 1 | -1/+1 |
| * | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-08 | 1 | -1/+1 |
| * | Fix a DAGCombiner abort on a bitcast from a scalar to a vector. | Dan Gohman | 2007-10-29 | 1 | -0/+10 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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