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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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test
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CodeGen
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X86
/
avx512-memfold.ll
Commit message (
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Author
Age
Files
Lines
*
[X86] In getScalarMaskingNode, replace scalar_to_vector with a bitcast to v8i...
Craig Topper
2018-11-21
1
-1
/
+1
*
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Puyan Lotfi
2018-01-31
1
-1
/
+1
*
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
Francis Visoiu Mistrih
2017-12-07
1
-1
/
+1
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-5
/
+5
*
[CodeGen] Print register names in lowercase in both MIR and debug output
Francis Visoiu Mistrih
2017-11-28
1
-1
/
+1
*
[X86] When selecting sse_load_f32/f64 pattern, make sure there's only one use...
Craig Topper
2017-08-21
1
-2
/
+3
*
[AVX512] Add a test to check what happens when a load is referenced by two di...
Craig Topper
2017-08-20
1
-0
/
+21
*
[X86][AVX512] Make i1 illegal in the CodeGen
Guy Blank
2017-05-19
1
-5
/
+0
*
[AVX-512] Use sse_load_f32/f64 in place of scalar_to_vector and scalar load i...
Craig Topper
2017-02-21
1
-8
/
+4
*
[AVX-512] Add test cases showing failure to fold zero extending scalar loads ...
Craig Topper
2017-02-21
1
-0
/
+77