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path: root/llvm/test/CodeGen/X86/avx512-extract-subvector.ll
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* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-2/+2
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-69/+69
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* [AVX512] Use alignedstore256 in a pattern that's emitting a 256-bit movaps fr...Craig Topper2017-08-191-1/+1
* [AVX-512] Add unmasked subvector inserts and extract to the execution domain ...Craig Topper2017-07-311-8/+8
* [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registersCraig Topper2017-03-281-16/+16
* [X86] Generate VZEROUPPER for Skylake-avx512.Amjad Aboud2017-03-031-0/+63
* [AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT in...Craig Topper2017-01-031-6/+6
* [AVX-512] Add more varied alignments to tests for storing the lower 128-bits ...Craig Topper2016-11-091-0/+132
* [AVX-512] Use alignedstore256 in patterns that look for stores of the lower 2...Craig Topper2016-11-091-5/+5
* [AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte ...Craig Topper2016-11-091-0/+144
* [AVX-512] Add missing patterns for selecting masked vector extracts that star...Craig Topper2016-10-311-0/+229
* [AVX-512] Fix duplicate column in AVX512 execution dependency table that was ...Craig Topper2016-08-011-12/+12
* [AVX512] Add VLX packed move instructions to the execution dependency fix pas...Craig Topper2016-07-311-3/+3
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-1/+3
* [AVX512] Add patterns to implement stores of extracts of least signficant sub...Craig Topper2016-05-221-1/+217
* [AVX512] Add patterns for extracting subvectors and storing to memory.Craig Topper2016-05-211-0/+72
* Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight2015-11-231-0/+1
* AVX512: vpextrb/w/d/q and vpinsrb/w/d/q implementation.Igor Breger2015-10-081-0/+55
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