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path: root/llvm/test/CodeGen/X86/avx512-calling-conv.ll
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* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-2/+2
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Geoff Berry2018-02-271-1/+1
* Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Quentin Colombet2018-02-171-1/+1
* [MachineCopyPropagation] Extend pass to do COPY source forwardingGeoff Berry2018-02-011-1/+1
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-7/+7
* [X86] Allow any_extend to be combined with setcc on VLX targets.Craig Topper2018-01-261-22/+10
* [X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToRegCraig Topper2018-01-031-35/+10
* [X86] Remove AND32ri8 from pattern for v1i1 load.Craig Topper2017-12-311-7/+12
* [X86] Fix a crash when returning a <1 x i1> value>Craig Topper2017-12-311-0/+19
* [X86] Teach WidenMaskArithmetic to handle any constant buildvector on the RHS...Craig Topper2017-12-241-21/+8
* [X86] Remove type restrictions from WidenMaskArithmetic.Craig Topper2017-12-231-64/+24
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-8/+8
* [X86] Use vector widening to support sign extend from i1 when the dest type i...Craig Topper2017-12-051-8/+12
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-35/+35
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-4/+4
* [MC] Suppress .Lcfi labels when emitting textual assemblyReid Kleckner2017-10-101-25/+0
* Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source for...Geoff Berry2017-10-031-1/+1
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Geoff Berry2017-10-021-1/+1
* Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source for...Sam McCall2017-09-041-1/+1
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Geoff Berry2017-09-011-1/+1
* Revert r312154 "Re-enable "[MachineCopyPropagation] Extend pass to do COPY so...Hans Wennborg2017-08-301-1/+1
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Geoff Berry2017-08-301-1/+1
* Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" ro...Geoff Berry2017-08-181-1/+1
* Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forward...Geoff Berry2017-08-171-1/+1
* Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"Geoff Berry2017-08-171-1/+1
* [MachineCopyPropagation] Extend pass to do COPY source forwardingGeoff Berry2017-08-161-1/+1
* [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registersCraig Topper2017-03-281-1/+1
* [X86] Generate VZEROUPPER for Skylake-avx512.Amjad Aboud2017-03-031-0/+3
* [AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselect...Craig Topper2017-01-091-16/+8
* MCStreamer: Use "cfi" for CFI related temp labels.Matthias Braun2016-11-301-25/+25
* [AVX-512] Fix v8i64 shift by immediate lowering on 32-bit targets.Craig Topper2016-09-061-4/+3
* [AVX-512] Simplify X86InstrInfo::copyPhysReg for 128/256-bit vectors with AVX...Craig Topper2016-09-051-18/+9
* [AVX-512] Fix duplicate column in AVX512 execution dependency table that was ...Craig Topper2016-08-011-9/+4
* [AVX512] Use VMOVAPSZ128rr/VMOVAPS256rr for VR128X/VR256X physreg moves when ...Craig Topper2016-07-181-8/+17
* [AVX512] Use vpternlog with an immediate of 0xff to create 512-bit all one ve...Craig Topper2016-07-111-8/+14
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-1/+5
* Update tests to use at least darwin9.Rafael Espindola2016-06-291-7/+7
* [AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX ...Craig Topper2016-05-081-5/+10
* [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.Ahmed Bougacha2016-05-071-1/+1
* Revert r268760, it caused PR27670.Nico Weber2016-05-061-1/+1
* [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.Ahmed Bougacha2016-05-061-1/+1
* [X86] Regenerated avx512 calling convention test checksSimon Pilgrim2016-04-121-5/+5
* AVX512: Fix truncate v32i8 to v32i1 lowering implementation.Igor Breger2016-01-281-4/+3
* AVX512: Masked move intrinsic implementation.Igor Breger2016-01-211-2/+2
* AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instru...Igor Breger2016-01-181-2/+0
* AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.Igor Breger2015-12-271-75/+406
* AVX-512: Added i1 type handling for calling conventions.Elena Demikhovsky2015-05-141-1/+68
* AVX-512: added calling convention for i1 vectors in 32-bit mode.Elena Demikhovsky2015-05-041-0/+43
* AVX-512: added calling conventions for i1 vectors.Elena Demikhovsky2015-04-271-0/+44
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