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* X86: Do not use llc -march in tests.Matthias Braun2017-08-021-2/+2
| | | | | | | | | | | | | | | `llc -march` is problematic because it only switches the target architecture, but leaves the operating system unchanged. This occasionally leads to indeterministic tests because the OS from LLVM_DEFAULT_TARGET_TRIPLE is used. However we can simply always use `llc -mtriple` instead. This changes all the tests to do this to avoid people using -march when they copy and paste parts of tests. See also the discussion in https://reviews.llvm.org/D35287 llvm-svn: 309774
* [x32] Use ebp/esp as frame and stack pointerPavel Chupin2014-08-071-2/+17
| | | | | | | | | | | | | | | | | | | | | | | Summary: Since pointers are 32-bit on x32 we can use ebp and esp as frame and stack pointer. Some operations like PUSH/POP and CFI_INSTRUCTION still require 64-bit register, so using 64-bit MachineFramePtr where required. X86_64 NaCl uses 64-bit frame/stack pointers, however it's been found that both isTarget64BitLP64 and isTarget64BitILP32 are true for NaCl. Addressing this issue here as well by making isTarget64BitLP64 false. Also mark hasReservedSpillSlot unreachable on X86. See inlined comments. Test Plan: Add one new simple test and upgrade 2 existing with x32 target case. Reviewers: nadav, dschuff Subscribers: llvm-commits, zinovy.nis Differential Revision: http://reviews.llvm.org/D4617 llvm-svn: 215091
* Enable MI Sched for x86.Andrew Trick2013-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This changes the SelectionDAG scheduling preference to source order. Soon, the SelectionDAG scheduler can be bypassed saving a nice chunk of compile time. Performance differences that result from this change are often a consequence of register coalescing. The register coalescer is far from perfect. Bugs can be filed for deficiencies. On x86 SandyBridge/Haswell, the source order schedule is often preserved, particularly for small blocks. Register pressure is generally improved over the SD scheduler's ILP mode. However, we are still able to handle large blocks that require latency hiding, unlike the SD scheduler's BURR mode. MI scheduler also attempts to discover the critical path in single-block loops and adjust heuristics accordingly. The MI scheduler relies on the new machine model. This is currently unimplemented for AVX, so we may not be generating the best code yet. Unit tests are updated so they don't depend on SD scheduling heuristics. llvm-svn: 192750
* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-1/+1
| | | | | | This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-1/+1
| | | | | | | Sorry for the unit test churn. I'll try to make the change permanently next time. llvm-svn: 184705
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-07-101-0/+1
| | | | | | | | | | | | | X86. Basically, this is a reapplication of r158087 with a few fixes. Specifically, (1) the stack pointer is restored from the base pointer before popping callee-saved registers and (2) in obscure cases (see comments in patch) we must cache the value of the original stack adjustment in the prologue and apply it in the epilogue. rdar://11496434 llvm-svn: 160002
* FileCheckize tests.Chad Rosier2012-06-221-1/+5
| | | | llvm-svn: 159044
* Temporarily revert r158087.Chandler Carruth2012-06-181-6/+1
| | | | | | | | | | | | | This patch causes problems when both dynamic stack realignment and dynamic allocas combine in the same function. With this patch, we no longer build the epilog correctly, and silently restore registers from the wrong position in the stack. Thanks to Matt for tracking this down, and getting at least an initial test case to Chad. I'm going to try to check a variation of that test case in so we can easily track the fixes required. llvm-svn: 158654
* Add support for dynamic stack realignment in the presence of dynamic allocas onChad Rosier2012-06-061-1/+6
| | | | | | | X86. rdar://11496434 llvm-svn: 158087
* Eliminate the restriction that the array size in an alloca must be i32.Dan Gohman2010-05-281-5/+4
| | | | | | This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-2/+2
| | | | llvm-svn: 81290
* this is apparently passing now. Evan/Dan, please checkChris Lattner2009-03-171-1/+0
| | | | | | | to see if this is producing the expected code or not, I'm not sure what the test was intended to check. llvm-svn: 67099
* xfail this.Evan Cheng2008-08-291-0/+1
| | | | llvm-svn: 55550
* Optimize DAGCombiner's worklist processing. Previously it startedDan Gohman2008-08-281-1/+1
| | | | | | | | | | | | | its work by putting all nodes in the worklist, requiring a big dynamic allocation. Now, DAGCombiner just iterates over the AllNodes list and maintains a worklist for nodes that are newly created or need to be revisited. This allows the worklist to stay small in most cases, so it can be a SmallVector. This has the side effect of making DAGCombine not miss a folding opportunity in alloca-align-rounding.ll. llvm-svn: 55498
* Update test: dynamic_stackalloc size *must* be rounded to ensure stack ptr ↵Evan Cheng2007-08-161-1/+8
| | | | | | be left in a valid state. llvm-svn: 41134
* It's not necessary to do rounding for alloca operations when the requestedDan Gohman2007-07-181-0/+9
alignment is equal to the stack alignment. llvm-svn: 40004
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