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* [X86] Teach convertToThreeAddress to handle SUB with immediateCraig Topper2019-07-151-8/+6
* [X86] Pre commit test cases for D64574. Along with a test case for PR42571. NFCCraig Topper2019-07-111-30/+83
* [DAGCombiner] fold (add (add (xor a, -1), b), 1) -> (sub b, a)Amaury Sechet2019-03-081-11/+5
* [X86] Enable the add with 128 -> sub with -128 encoding trick with X86ISD::AD...Craig Topper2019-03-061-0/+153
* Add test case for add to sub transformation. NFCAmaury Sechet2019-03-021-0/+30
* [SelectionDAG] allow vector types with isBitwiseNot()Sanjay Patel2018-09-191-7/+5
* [x86] add test for add+not vector fold; NFCSanjay Patel2018-09-191-0/+41
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-24/+24
* [DAGcombine] Teach the combiner about -a = ~a + 1Amaury Sechet2018-06-041-19/+13
* Add test case for D46505 . NFCAmaury Sechet2018-05-261-0/+62
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-2/+2
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-2/+2
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-45/+45
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* [x86] Extend the manual ISel of `add` and `sub` with both RMW memoryChandler Carruth2017-09-071-4/+2
* [x86] Teach the backend to fold more read-modify-write memory operandsChandler Carruth2017-08-251-4/+2
* [x86] NFC - normalize test case formatting of IR and generate CHECKChandler Carruth2017-08-251-94/+296
* X86: Do not use llc -march in tests.Matthias Braun2017-08-021-1/+1
* Revert "CodeGen: Allow small copyable blocks to "break" the CFG."Kyle Butt2017-01-111-4/+2
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-101-2/+4
* [X86] Fix stupid typo in isel lowering.Eli Friedman2016-07-141-0/+36
* Enable MI Sched for x86.Andrew Trick2013-10-151-6/+6
* Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....Stephen Lin2013-07-131-11/+11
* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-6/+6
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-6/+6
* Enhance bool simplifcation in X86 to handle more casesMichael Liao2013-04-111-2/+2
* Remove -join-physregs from the test suite.Jakob Stoklund Olesen2012-05-171-6/+4
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-011-3/+3
* Prepare remaining tests for -join-physreg going away.Jakob Stoklund Olesen2011-05-041-2/+4
* X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right oper...Benjamin Kramer2011-03-081-0/+15
* Relax expressions and add explicit triplets -linux and -win32.NAKAMURA Takumi2011-02-221-6/+7
* DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal....Benjamin Kramer2010-12-221-0/+12
* now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,Chris Lattner2010-12-201-0/+19
* We lower setb to sbb with the hope that the and will go away, when it Chris Lattner2010-12-201-0/+9
* merge a target-specific add test into x86 directory.Chris Lattner2010-02-091-0/+20
* merge another test in, drop the trivially constant folded cases.Chris Lattner2010-02-091-0/+49
* consolidate and filecheckize two tests.Chris Lattner2010-02-091-0/+25
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