| Commit message (Expand) | Author | Age | Files | Lines |
* | [X86] Teach convertToThreeAddress to handle SUB with immediate | Craig Topper | 2019-07-15 | 1 | -8/+6 |
* | [X86] Pre commit test cases for D64574. Along with a test case for PR42571. NFC | Craig Topper | 2019-07-11 | 1 | -30/+83 |
* | [DAGCombiner] fold (add (add (xor a, -1), b), 1) -> (sub b, a) | Amaury Sechet | 2019-03-08 | 1 | -11/+5 |
* | [X86] Enable the add with 128 -> sub with -128 encoding trick with X86ISD::AD... | Craig Topper | 2019-03-06 | 1 | -0/+153 |
* | Add test case for add to sub transformation. NFC | Amaury Sechet | 2019-03-02 | 1 | -0/+30 |
* | [SelectionDAG] allow vector types with isBitwiseNot() | Sanjay Patel | 2018-09-19 | 1 | -7/+5 |
* | [x86] add test for add+not vector fold; NFC | Sanjay Patel | 2018-09-19 | 1 | -0/+41 |
* | [X86] Handle COPYs of physregs better (regalloc hints) | Simon Pilgrim | 2018-09-19 | 1 | -24/+24 |
* | [DAGcombine] Teach the combiner about -a = ~a + 1 | Amaury Sechet | 2018-06-04 | 1 | -19/+13 |
* | Add test case for D46505 . NFC | Amaury Sechet | 2018-05-26 | 1 | -0/+62 |
* | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -2/+2 |
* | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih | 2017-12-07 | 1 | -2/+2 |
* | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -45/+45 |
* | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -2/+2 |
* | [x86] Extend the manual ISel of `add` and `sub` with both RMW memory | Chandler Carruth | 2017-09-07 | 1 | -4/+2 |
* | [x86] Teach the backend to fold more read-modify-write memory operands | Chandler Carruth | 2017-08-25 | 1 | -4/+2 |
* | [x86] NFC - normalize test case formatting of IR and generate CHECK | Chandler Carruth | 2017-08-25 | 1 | -94/+296 |
* | X86: Do not use llc -march in tests. | Matthias Braun | 2017-08-02 | 1 | -1/+1 |
* | Revert "CodeGen: Allow small copyable blocks to "break" the CFG." | Kyle Butt | 2017-01-11 | 1 | -4/+2 |
* | CodeGen: Allow small copyable blocks to "break" the CFG. | Kyle Butt | 2017-01-10 | 1 | -2/+4 |
* | [X86] Fix stupid typo in isel lowering. | Eli Friedman | 2016-07-14 | 1 | -0/+36 |
* | Enable MI Sched for x86. | Andrew Trick | 2013-10-15 | 1 | -6/+6 |
* | Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging.... | Stephen Lin | 2013-07-13 | 1 | -11/+11 |
* | Revert "Temporarily enable MI-Sched on X86." | Andrew Trick | 2013-06-25 | 1 | -6/+6 |
* | Temporarily enable MI-Sched on X86. | Andrew Trick | 2013-06-24 | 1 | -6/+6 |
* | Enhance bool simplifcation in X86 to handle more cases | Michael Liao | 2013-04-11 | 1 | -2/+2 |
* | Remove -join-physregs from the test suite. | Jakob Stoklund Olesen | 2012-05-17 | 1 | -6/+4 |
* | Instruction scheduling itinerary for Intel Atom. | Andrew Trick | 2012-02-01 | 1 | -3/+3 |
* | Prepare remaining tests for -join-physreg going away. | Jakob Stoklund Olesen | 2011-05-04 | 1 | -2/+4 |
* | X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right oper... | Benjamin Kramer | 2011-03-08 | 1 | -0/+15 |
* | Relax expressions and add explicit triplets -linux and -win32. | NAKAMURA Takumi | 2011-02-22 | 1 | -6/+7 |
* | DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal.... | Benjamin Kramer | 2010-12-22 | 1 | -0/+12 |
* | now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results, | Chris Lattner | 2010-12-20 | 1 | -0/+19 |
* | We lower setb to sbb with the hope that the and will go away, when it | Chris Lattner | 2010-12-20 | 1 | -0/+9 |
* | merge a target-specific add test into x86 directory. | Chris Lattner | 2010-02-09 | 1 | -0/+20 |
* | merge another test in, drop the trivially constant folded cases. | Chris Lattner | 2010-02-09 | 1 | -0/+49 |
* | consolidate and filecheckize two tests. | Chris Lattner | 2010-02-09 | 1 | -0/+25 |