| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [DAGCombiner] re-enable truncation of binops | Sanjay Patel | 2018-12-08 | 1 | -1/+1 |
| * | [DAGCombiner] disable truncation of binops by default | Sanjay Patel | 2018-12-07 | 1 | -1/+1 |
| * | [DAGCombiner] narrow truncated binops | Sanjay Patel | 2018-11-29 | 1 | -1/+1 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -1/+1 |
| * | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih | 2017-12-07 | 1 | -1/+1 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -1/+1 |
| * | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -1/+1 |
| * | [x86] regenerate checks with update_llc_test_checks.py | Sanjay Patel | 2017-06-12 | 1 | -2/+1 |
| * | [DAG] disable nsw/nuw for add/sub/mul when simplifying based on demanded bits... | Sanjay Patel | 2016-10-31 | 1 | -0/+25 |

